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authorReinUsesLisp <reinuseslisp@airmail.cc>2018-12-21 03:56:21 +0100
committerReinUsesLisp <reinuseslisp@airmail.cc>2019-01-15 21:54:50 +0100
commit964ddeeb90b655d8b5558002db7c780c0394263c (patch)
treef170b3e8681a94d694961e141114f74d7141a9ef /src/video_core
parentshader_decode: Implement FADD_C, FADD_R and FADD_IMM (diff)
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Diffstat (limited to 'src/video_core')
-rw-r--r--src/video_core/shader/decode/arithmetic.cpp29
1 files changed, 29 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/arithmetic.cpp b/src/video_core/shader/decode/arithmetic.cpp
index d196d94b5..fb688c324 100644
--- a/src/video_core/shader/decode/arithmetic.cpp
+++ b/src/video_core/shader/decode/arithmetic.cpp
@@ -93,6 +93,35 @@ u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) {
SetRegister(bb, instr.gpr0, value);
break;
}
+ case OpCode::Id::MUFU: {
+ op_a = GetOperandAbsNegFloat(op_a, instr.alu.abs_a, instr.alu.negate_a);
+
+ Node value = [&]() {
+ switch (instr.sub_op) {
+ case SubOp::Cos:
+ return Operation(OperationCode::FCos, PRECISE, op_a);
+ case SubOp::Sin:
+ return Operation(OperationCode::FSin, PRECISE, op_a);
+ case SubOp::Ex2:
+ return Operation(OperationCode::FExp2, PRECISE, op_a);
+ case SubOp::Lg2:
+ return Operation(OperationCode::FLog2, PRECISE, op_a);
+ case SubOp::Rcp:
+ return Operation(OperationCode::FDiv, PRECISE, Immediate(1.0f), op_a);
+ case SubOp::Rsq:
+ return Operation(OperationCode::FInverseSqrt, PRECISE, op_a);
+ case SubOp::Sqrt:
+ return Operation(OperationCode::FSqrt, PRECISE, op_a);
+ default:
+ UNIMPLEMENTED_MSG("Unhandled MUFU sub op={0:x}",
+ static_cast<unsigned>(instr.sub_op.Value()));
+ }
+ }();
+ value = GetSaturatedFloat(value, instr.alu.saturate_d);
+
+ SetRegister(bb, instr.gpr0, value);
+ break;
+ }
default:
UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName());
}