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-rw-r--r--src/video_core/engines/draw_manager.cpp21
-rw-r--r--src/video_core/engines/draw_manager.h20
-rw-r--r--src/video_core/engines/engine_interface.h2
3 files changed, 43 insertions, 0 deletions
diff --git a/src/video_core/engines/draw_manager.cpp b/src/video_core/engines/draw_manager.cpp
index 3a78421f6..4fa77b684 100644
--- a/src/video_core/engines/draw_manager.cpp
+++ b/src/video_core/engines/draw_manager.cpp
@@ -91,6 +91,16 @@ void DrawManager::DrawIndex(PrimitiveTopology topology, u32 index_first, u32 ind
ProcessDraw(true, num_instances);
}
+void DrawManager::DrawIndexedIndirect(PrimitiveTopology topology, u32 index_first, u32 index_count) {
+ const auto& regs{maxwell3d->regs};
+ draw_state.topology = topology;
+ draw_state.index_buffer = regs.index_buffer;
+ draw_state.index_buffer.first = index_first;
+ draw_state.index_buffer.count = index_count;
+
+ ProcessDrawIndirect(true);
+}
+
void DrawManager::SetInlineIndexBuffer(u32 index) {
draw_state.inline_index_draw_indexes.push_back(static_cast<u8>(index & 0x000000ff));
draw_state.inline_index_draw_indexes.push_back(static_cast<u8>((index & 0x0000ff00) >> 8));
@@ -198,4 +208,15 @@ void DrawManager::ProcessDraw(bool draw_indexed, u32 instance_count) {
maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
}
}
+
+void DrawManager::ProcessDrawIndirect(bool draw_indexed) {
+ LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology,
+ draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
+
+ UpdateTopology();
+
+ if (maxwell3d->ShouldExecute()) {
+ maxwell3d->rasterizer->DrawIndirect(draw_indexed);
+ }
+}
} // namespace Tegra::Engines
diff --git a/src/video_core/engines/draw_manager.h b/src/video_core/engines/draw_manager.h
index 0e6930a9c..0cdb37f83 100644
--- a/src/video_core/engines/draw_manager.h
+++ b/src/video_core/engines/draw_manager.h
@@ -32,6 +32,13 @@ public:
std::vector<u8> inline_index_draw_indexes;
};
+ struct IndirectParams {
+ GPUVAddr start_address;
+ size_t buffer_size;
+ size_t max_draw_counts;
+ size_t stride;
+ };
+
explicit DrawManager(Maxwell3D* maxwell_3d);
void ProcessMethodCall(u32 method, u32 argument);
@@ -46,10 +53,20 @@ public:
void DrawIndex(PrimitiveTopology topology, u32 index_first, u32 index_count, u32 base_index,
u32 base_instance, u32 num_instances);
+ void DrawIndexedIndirect(PrimitiveTopology topology, u32 index_first, u32 index_count);
+
const State& GetDrawState() const {
return draw_state;
}
+ IndirectParams& GetIndirectParams() {
+ return indirect_state;
+ }
+
+ const IndirectParams& GetIndirectParams() const {
+ return indirect_state;
+ }
+
private:
void SetInlineIndexBuffer(u32 index);
@@ -63,7 +80,10 @@ private:
void ProcessDraw(bool draw_indexed, u32 instance_count);
+ void ProcessDrawIndirect(bool draw_indexed);
+
Maxwell3D* maxwell3d{};
State draw_state{};
+ IndirectParams indirect_state{};
};
} // namespace Tegra::Engines
diff --git a/src/video_core/engines/engine_interface.h b/src/video_core/engines/engine_interface.h
index 26cde8584..76630272d 100644
--- a/src/video_core/engines/engine_interface.h
+++ b/src/video_core/engines/engine_interface.h
@@ -17,6 +17,8 @@ public:
/// Write multiple values to the register identified by method.
virtual void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
u32 methods_pending) = 0;
+
+ GPUVAddr current_dma_segment;
};
} // namespace Tegra::Engines