diff options
Diffstat (limited to 'src/video_core/engines')
-rw-r--r-- | src/video_core/engines/fermi_2d.h | 14 | ||||
-rw-r--r-- | src/video_core/engines/maxwell_3d.h | 24 |
2 files changed, 34 insertions, 4 deletions
diff --git a/src/video_core/engines/fermi_2d.h b/src/video_core/engines/fermi_2d.h index 81d15c62a..2a6e8bbbb 100644 --- a/src/video_core/engines/fermi_2d.h +++ b/src/video_core/engines/fermi_2d.h @@ -36,9 +36,9 @@ public: RenderTargetFormat format; BitField<0, 1, u32> linear; union { - BitField<0, 4, u32> block_depth; + BitField<0, 4, u32> block_width; BitField<4, 4, u32> block_height; - BitField<8, 4, u32> block_width; + BitField<8, 4, u32> block_depth; }; u32 depth; u32 layer; @@ -53,10 +53,20 @@ public: address_low); } + u32 BlockWidth() const { + // The block width is stored in log2 format. + return 1 << block_width; + } + u32 BlockHeight() const { // The block height is stored in log2 format. return 1 << block_height; } + + u32 BlockDepth() const { + // The block depth is stored in log2 format. + return 1 << block_depth; + } }; static_assert(sizeof(Surface) == 0x28, "Surface has incorrect size"); diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 20e1884da..c8d1b6478 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -347,6 +347,16 @@ public: DecrWrap = 8, }; + enum class MemoryLayout : u32 { + Linear = 0, + BlockLinear = 1, + }; + + enum class InvMemoryLayout : u32 { + BlockLinear = 0, + Linear = 1, + }; + struct Cull { enum class FrontFace : u32 { ClockWise = 0x0900, @@ -432,7 +442,12 @@ public: u32 width; u32 height; Tegra::RenderTargetFormat format; - u32 block_dimensions; + union { + BitField<0, 3, u32> block_width; + BitField<4, 3, u32> block_height; + BitField<8, 3, u32> block_depth; + BitField<12, 1, InvMemoryLayout> type; + } memory_layout; u32 array_mode; u32 layer_stride; u32 base_layer; @@ -562,7 +577,12 @@ public: u32 address_high; u32 address_low; Tegra::DepthFormat format; - u32 block_dimensions; + union { + BitField<0, 4, u32> block_width; + BitField<4, 4, u32> block_height; + BitField<8, 4, u32> block_depth; + BitField<20, 1, InvMemoryLayout> type; + } memory_layout; u32 layer_stride; GPUVAddr Address() const { |