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authorReinUsesLisp <reinuseslisp@airmail.cc>2018-12-21 03:58:48 +0100
committerReinUsesLisp <reinuseslisp@airmail.cc>2019-01-15 21:54:50 +0100
commitc9b2a1b051fe386fa33427b527ca626ad3fdbfaf (patch)
treee9a94287060f6ee864ac259444849d75c5fde9ed /src
parentshader_decode: Implement MOV32_IMM (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/video_core/shader/decode/arithmetic_immediate.cpp10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/video_core/shader/decode/arithmetic_immediate.cpp b/src/video_core/shader/decode/arithmetic_immediate.cpp
index 2d385f48a..0e4cbccab 100644
--- a/src/video_core/shader/decode/arithmetic_immediate.cpp
+++ b/src/video_core/shader/decode/arithmetic_immediate.cpp
@@ -21,6 +21,16 @@ u32 ShaderIR::DecodeArithmeticImmediate(BasicBlock& bb, u32 pc) {
SetRegister(bb, instr.gpr0, GetImmediate32(instr));
break;
}
+ case OpCode::Id::FMUL32_IMM: {
+ UNIMPLEMENTED_IF_MSG(instr.op_32.generates_cc,
+ "Condition codes generation in FMUL32 is not implemented");
+ Node value =
+ Operation(OperationCode::FMul, PRECISE, GetRegister(instr.gpr8), GetImmediate32(instr));
+ value = GetSaturatedFloat(value, instr.fmul32.saturate);
+
+ SetRegister(bb, instr.gpr0, value);
+ break;
+ }
default:
UNIMPLEMENTED_MSG("Unhandled arithmetic immediate instruction: {}",
opcode->get().GetName());