diff options
author | Lioncash <mathew1800@gmail.com> | 2018-07-21 00:56:53 +0200 |
---|---|---|
committer | Lioncash <mathew1800@gmail.com> | 2018-07-21 00:57:40 +0200 |
commit | ae09adfcb343f4ebf73a3a85a911422cbf50d6fc (patch) | |
tree | 450f06d8bd27cdce2baa290e6850acf2d903d059 /src | |
parent | Merge pull request #742 from bunnei/misc-apm (diff) | |
download | yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar.gz yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar.bz2 yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar.lz yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar.xz yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.tar.zst yuzu-ae09adfcb343f4ebf73a3a85a911422cbf50d6fc.zip |
Diffstat (limited to 'src')
-rw-r--r-- | src/core/arm/arm_interface.h | 3 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 2 | ||||
-rw-r--r-- | src/core/arm/unicorn/arm_unicorn.cpp | 4 |
3 files changed, 0 insertions, 9 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 8416e73b0..a8273bb1c 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -20,9 +20,6 @@ public: u64 cpsr; std::array<u128, 32> fpu_registers; u64 fpscr; - - // TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT - VAddr tls_address; }; /// Runs the CPU until an event happens diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 3572ee7b9..4417c6da4 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -203,7 +203,6 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { ctx.cpsr = jit->GetPstate(); ctx.fpu_registers = jit->GetVectors(); ctx.fpscr = jit->GetFpcr(); - ctx.tls_address = cb->tpidrro_el0; } void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { @@ -213,7 +212,6 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { jit->SetPstate(static_cast<u32>(ctx.cpsr)); jit->SetVectors(ctx.fpu_registers); jit->SetFpcr(static_cast<u32>(ctx.fpscr)); - cb->tpidrro_el0 = ctx.tls_address; } void ARM_Dynarmic::PrepareReschedule() { diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp index d2d699e9b..b7afd9ed8 100644 --- a/src/core/arm/unicorn/arm_unicorn.cpp +++ b/src/core/arm/unicorn/arm_unicorn.cpp @@ -220,8 +220,6 @@ void ARM_Unicorn::SaveContext(ARM_Interface::ThreadContext& ctx) { CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31)); - ctx.tls_address = GetTlsAddress(); - for (int i = 0; i < 32; ++i) { uregs[i] = UC_ARM64_REG_Q0 + i; tregs[i] = &ctx.fpu_registers[i]; @@ -249,8 +247,6 @@ void ARM_Unicorn::LoadContext(const ARM_Interface::ThreadContext& ctx) { CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31)); - SetTlsAddress(ctx.tls_address); - for (auto i = 0; i < 32; ++i) { uregs[i] = UC_ARM64_REG_Q0 + i; tregs[i] = (void*)&ctx.fpu_registers[i]; |