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authorLioncash <mathew1800@gmail.com>2014-12-17 16:05:26 +0100
committerLioncash <mathew1800@gmail.com>2014-12-17 16:26:20 +0100
commit2d91164bb9aa24829381f2518faed9abbdd4d6fa (patch)
tree5035ca0328a4f372bcde5016e92d5eb33629a034 /src
parentMerge pull request #289 from lioncash/smops (diff)
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Diffstat (limited to 'src')
-rw-r--r--src/core/arm/interpreter/armemu.cpp21
1 files changed, 9 insertions, 12 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index 5752d116f..0d1b2e60e 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -5669,11 +5669,8 @@ L_stm_s_takeabort:
/* Attempt to emulate an ARMv6 instruction.
Returns non-zero upon success. */
- static int
- handle_v6_insn (ARMul_State * state, ARMword instr) {
- ARMword lhs, temp;
-
- switch (BITS (20, 27)) {
+ static int handle_v6_insn(ARMul_State* state, ARMword instr) {
+ switch (BITS(20, 27)) {
case 0x03:
printf ("Unhandled v6 insn: ldr\n");
break;
@@ -5691,7 +5688,7 @@ L_stm_s_takeabort:
/* strex */
u32 l = LHSReg;
u32 r = RHSReg;
- lhs = LHS;
+ u32 lhs = LHS;
bool enter = false;
@@ -5716,7 +5713,7 @@ L_stm_s_takeabort:
case 0x19:
/* ldrex */
if (BITS(4, 7) == 0x9) {
- lhs = LHS;
+ u32 lhs = LHS;
state->currentexaddr = lhs;
state->currentexval = ARMul_ReadWord(state, lhs);
@@ -5735,7 +5732,7 @@ L_stm_s_takeabort:
case 0x1c:
if (BITS(4, 7) == 0x9) {
/* strexb */
- lhs = LHS;
+ u32 lhs = LHS;
bool enter = false;
@@ -5765,11 +5762,11 @@ L_stm_s_takeabort:
case 0x1d:
if ((BITS(4, 7)) == 0x9) {
/* ldrexb */
- temp = LHS;
- LoadByte(state, instr, temp, LUNSIGNED);
+ u32 lhs = LHS;
+ LoadByte(state, instr, lhs, LUNSIGNED);
- state->currentexaddr = temp;
- state->currentexval = (u32)ARMul_ReadByte(state, temp);
+ state->currentexaddr = lhs;
+ state->currentexval = (u32)ARMul_ReadByte(state, lhs);
//state->Reg[BITS(12, 15)] = ARMul_LoadByte(state, state->Reg[BITS(16, 19)]);
//printf("ldrexb\n");