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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-01-16 20:20:18 +0100 |
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committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-02-13 06:17:24 +0100 |
commit | 35df1d1864ba721ea7b1cebf9a106dd771cde4f5 (patch) | |
tree | 034a8281294246e2a8eea92d1937607ad00ed428 /src/video_core/renderer_vulkan/vk_compute_pass.h | |
parent | vulkan_device: Enable robustBufferAccess (diff) | |
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Diffstat (limited to 'src/video_core/renderer_vulkan/vk_compute_pass.h')
-rw-r--r-- | src/video_core/renderer_vulkan/vk_compute_pass.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/video_core/renderer_vulkan/vk_compute_pass.h b/src/video_core/renderer_vulkan/vk_compute_pass.h index 4904019f5..17d781d99 100644 --- a/src/video_core/renderer_vulkan/vk_compute_pass.h +++ b/src/video_core/renderer_vulkan/vk_compute_pass.h @@ -50,7 +50,8 @@ public: /// Assemble uint8 indices into an uint16 index buffer /// Returns a pair with the staging buffer, and the offset where the assembled data is - std::pair<VkBuffer, u32> Assemble(u32 num_vertices, VkBuffer src_buffer, u32 src_offset); + std::pair<VkBuffer, VkDeviceSize> Assemble(u32 num_vertices, VkBuffer src_buffer, + u32 src_offset); private: VKScheduler& scheduler; @@ -66,9 +67,9 @@ public: VKUpdateDescriptorQueue& update_descriptor_queue_); ~QuadIndexedPass(); - std::pair<VkBuffer, u32> Assemble(Tegra::Engines::Maxwell3D::Regs::IndexFormat index_format, - u32 num_vertices, u32 base_vertex, VkBuffer src_buffer, - u32 src_offset); + std::pair<VkBuffer, VkDeviceSize> Assemble( + Tegra::Engines::Maxwell3D::Regs::IndexFormat index_format, u32 num_vertices, + u32 base_vertex, VkBuffer src_buffer, u32 src_offset); private: VKScheduler& scheduler; |