summaryrefslogtreecommitdiffstats
path: root/src/video_core/engines
diff options
context:
space:
mode:
authorLioncash <mathew1800@gmail.com>2018-10-20 21:58:06 +0200
committerLioncash <mathew1800@gmail.com>2018-10-20 21:58:09 +0200
commitc1e5525fc622e5bf5c40acceba4a07529051fab3 (patch)
treed77362f0fceace3a09776b7d828c1c4ca56fd58b /src/video_core/engines
parentmaxwell_dma: Make variables const where applicable within HandleCopy() (diff)
downloadyuzu-c1e5525fc622e5bf5c40acceba4a07529051fab3.tar
yuzu-c1e5525fc622e5bf5c40acceba4a07529051fab3.tar.gz
yuzu-c1e5525fc622e5bf5c40acceba4a07529051fab3.tar.bz2
yuzu-c1e5525fc622e5bf5c40acceba4a07529051fab3.tar.lz
yuzu-c1e5525fc622e5bf5c40acceba4a07529051fab3.tar.xz
yuzu-c1e5525fc622e5bf5c40acceba4a07529051fab3.tar.zst
yuzu-c1e5525fc622e5bf5c40acceba4a07529051fab3.zip
Diffstat (limited to 'src/video_core/engines')
-rw-r--r--src/video_core/engines/maxwell_3d.cpp6
-rw-r--r--src/video_core/engines/maxwell_compute.cpp6
-rw-r--r--src/video_core/engines/maxwell_dma.cpp6
3 files changed, 6 insertions, 12 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 8afd26fe9..bca014a4a 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -13,8 +13,7 @@
#include "video_core/renderer_base.h"
#include "video_core/textures/texture.h"
-namespace Tegra {
-namespace Engines {
+namespace Tegra::Engines {
/// First register id that is actually a Macro call.
constexpr u32 MacroRegistersStart = 0xE00;
@@ -408,5 +407,4 @@ void Maxwell3D::ProcessClearBuffers() {
rasterizer.Clear();
}
-} // namespace Engines
-} // namespace Tegra
+} // namespace Tegra::Engines
diff --git a/src/video_core/engines/maxwell_compute.cpp b/src/video_core/engines/maxwell_compute.cpp
index 59e28b22d..8b5f08351 100644
--- a/src/video_core/engines/maxwell_compute.cpp
+++ b/src/video_core/engines/maxwell_compute.cpp
@@ -6,8 +6,7 @@
#include "core/core.h"
#include "video_core/engines/maxwell_compute.h"
-namespace Tegra {
-namespace Engines {
+namespace Tegra::Engines {
void MaxwellCompute::WriteReg(u32 method, u32 value) {
ASSERT_MSG(method < Regs::NUM_REGS,
@@ -26,5 +25,4 @@ void MaxwellCompute::WriteReg(u32 method, u32 value) {
}
}
-} // namespace Engines
-} // namespace Tegra
+} // namespace Tegra::Engines
diff --git a/src/video_core/engines/maxwell_dma.cpp b/src/video_core/engines/maxwell_dma.cpp
index 9469bce59..b8a78cf82 100644
--- a/src/video_core/engines/maxwell_dma.cpp
+++ b/src/video_core/engines/maxwell_dma.cpp
@@ -7,8 +7,7 @@
#include "video_core/rasterizer_interface.h"
#include "video_core/textures/decoders.h"
-namespace Tegra {
-namespace Engines {
+namespace Tegra::Engines {
MaxwellDMA::MaxwellDMA(VideoCore::RasterizerInterface& rasterizer, MemoryManager& memory_manager)
: memory_manager(memory_manager), rasterizer{rasterizer} {}
@@ -119,5 +118,4 @@ void MaxwellDMA::HandleCopy() {
}
}
-} // namespace Engines
-} // namespace Tegra
+} // namespace Tegra::Engines