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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2019-11-01 04:43:59 +0100 |
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committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2019-12-07 02:07:31 +0100 |
commit | 707bf41c6f3bb111407c884659a5a1e5757df53f (patch) | |
tree | ee0df1bc3e9990489523b2eff4c076143ac6a9e2 /src/video_core/engines/maxwell_3d.h | |
parent | maxwell_3d: Add patch vertices register (diff) | |
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Diffstat (limited to 'src/video_core/engines/maxwell_3d.h')
-rw-r--r-- | src/video_core/engines/maxwell_3d.h | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h index 884f2b018..05d182006 100644 --- a/src/video_core/engines/maxwell_3d.h +++ b/src/video_core/engines/maxwell_3d.h @@ -491,6 +491,23 @@ public: INSERT_UNION_PADDING_WORDS(1); }; + enum class DepthMode : u32 { + MinusOneToOne = 0, + ZeroToOne = 1, + }; + + enum class TessellationPrimitive : u32 { + Isolines = 0, + Triangles = 1, + Quads = 2, + }; + + enum class TessellationSpacing : u32 { + Equal = 0, + FractionalOdd = 1, + FractionalEven = 2, + }; + struct RenderTargetConfig { u32 address_high; u32 address_low; @@ -628,7 +645,16 @@ public: }; } sync_info; - INSERT_UNION_PADDING_WORDS(0x11E); + INSERT_UNION_PADDING_WORDS(0x15); + + union { + BitField<0, 2, TessellationPrimitive> prim; + BitField<4, 2, TessellationSpacing> spacing; + BitField<8, 1, u32> cw; + BitField<9, 1, u32> connected; + } tess_mode; + + INSERT_UNION_PADDING_WORDS(0x108); u32 tfb_enabled; @@ -1388,6 +1414,7 @@ ASSERT_REG_POSITION(upload, 0x60); ASSERT_REG_POSITION(exec_upload, 0x6C); ASSERT_REG_POSITION(data_upload, 0x6D); ASSERT_REG_POSITION(sync_info, 0xB2); +ASSERT_REG_POSITION(tess_mode, 0xC8); ASSERT_REG_POSITION(tfb_enabled, 0x1D1); ASSERT_REG_POSITION(rt, 0x200); ASSERT_REG_POSITION(viewport_transform, 0x280); |