diff options
author | Subv <subv2112@gmail.com> | 2018-04-24 03:12:40 +0200 |
---|---|---|
committer | Subv <subv2112@gmail.com> | 2018-04-25 18:55:29 +0200 |
commit | b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed (patch) | |
tree | 8dc60c3b4fedc1300c0a66079df11197b4e366fa /src/video_core/engines/fermi_2d.h | |
parent | GPU: Reduce the number of registers of Maxwell3D to 0xE00. (diff) | |
download | yuzu-b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed.tar yuzu-b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed.tar.gz yuzu-b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed.tar.bz2 yuzu-b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed.tar.lz yuzu-b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed.tar.xz yuzu-b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed.tar.zst yuzu-b1109931b9a92ce89635cb7c0c0c1c0c7e6866ed.zip |
Diffstat (limited to 'src/video_core/engines/fermi_2d.h')
-rw-r--r-- | src/video_core/engines/fermi_2d.h | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/src/video_core/engines/fermi_2d.h b/src/video_core/engines/fermi_2d.h index 8967ddede..a97f5bb28 100644 --- a/src/video_core/engines/fermi_2d.h +++ b/src/video_core/engines/fermi_2d.h @@ -4,19 +4,45 @@ #pragma once +#include <array> +#include "common/assert.h" +#include "common/common_funcs.h" #include "common/common_types.h" +#include "video_core/memory_manager.h" namespace Tegra { namespace Engines { +#define FERMI2D_REG_INDEX(field_name) \ + (offsetof(Tegra::Engines::Fermi2D::Regs, field_name) / sizeof(u32)) + class Fermi2D final { public: - Fermi2D() = default; + explicit Fermi2D(MemoryManager& memory_manager); ~Fermi2D() = default; /// Write the value to the register identified by method. void WriteReg(u32 method, u32 value); + + struct Regs { + static constexpr size_t NUM_REGS = 0x258; + + union { + struct { + INSERT_PADDING_WORDS(0x258); + }; + std::array<u32, NUM_REGS> reg_array; + }; + } regs{}; + + MemoryManager& memory_manager; }; +#define ASSERT_REG_POSITION(field_name, position) \ + static_assert(offsetof(Fermi2D::Regs, field_name) == position * 4, \ + "Field " #field_name " has invalid position") + +#undef ASSERT_REG_POSITION + } // namespace Engines } // namespace Tegra |