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| author | bunnei <bunneidev@gmail.com> | 2022-02-02 18:57:22 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-02-02 18:57:22 +0100 |
| commit | 09400e4f4e34d1feed9314cee734107eb40442c2 (patch) | |
| tree | ec77b4867a832ae3df18707cc53da7cd9a5a9987 /src/shader_recompiler/ir_opt/lower_int64_to_int32.cpp | |
| parent | Merge pull request #7807 from german77/moar-buttons (diff) | |
| parent | emit_glsl_atomic: Implement 32x2 fallback atomic ops (diff) | |
| download | yuzu-09400e4f4e34d1feed9314cee734107eb40442c2.tar yuzu-09400e4f4e34d1feed9314cee734107eb40442c2.tar.gz yuzu-09400e4f4e34d1feed9314cee734107eb40442c2.tar.bz2 yuzu-09400e4f4e34d1feed9314cee734107eb40442c2.tar.lz yuzu-09400e4f4e34d1feed9314cee734107eb40442c2.tar.xz yuzu-09400e4f4e34d1feed9314cee734107eb40442c2.tar.zst yuzu-09400e4f4e34d1feed9314cee734107eb40442c2.zip | |
Diffstat (limited to 'src/shader_recompiler/ir_opt/lower_int64_to_int32.cpp')
| -rw-r--r-- | src/shader_recompiler/ir_opt/lower_int64_to_int32.cpp | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/shader_recompiler/ir_opt/lower_int64_to_int32.cpp b/src/shader_recompiler/ir_opt/lower_int64_to_int32.cpp index e80d3d1d9..c2654cd9b 100644 --- a/src/shader_recompiler/ir_opt/lower_int64_to_int32.cpp +++ b/src/shader_recompiler/ir_opt/lower_int64_to_int32.cpp @@ -199,6 +199,26 @@ void Lower(IR::Block& block, IR::Inst& inst) { return ShiftRightLogical64To32(block, inst); case IR::Opcode::ShiftRightArithmetic64: return ShiftRightArithmetic64To32(block, inst); + case IR::Opcode::SharedAtomicExchange64: + return inst.ReplaceOpcode(IR::Opcode::SharedAtomicExchange32x2); + case IR::Opcode::GlobalAtomicIAdd64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicIAdd32x2); + case IR::Opcode::GlobalAtomicSMin64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicSMin32x2); + case IR::Opcode::GlobalAtomicUMin64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicUMin32x2); + case IR::Opcode::GlobalAtomicSMax64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicSMax32x2); + case IR::Opcode::GlobalAtomicUMax64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicUMax32x2); + case IR::Opcode::GlobalAtomicAnd64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicAnd32x2); + case IR::Opcode::GlobalAtomicOr64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicOr32x2); + case IR::Opcode::GlobalAtomicXor64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicXor32x2); + case IR::Opcode::GlobalAtomicExchange64: + return inst.ReplaceOpcode(IR::Opcode::GlobalAtomicExchange32x2); default: break; } |