4 files changed, 12 insertions, 12 deletions

diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index dbfc670b0..dbd38a28b 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -162,8 +162,8 @@ U32 IREmitter::GetCbuf(const U32& binding, const U32& byte_offset) {
     return Inst<U32>(Opcode::GetCbufU32, binding, byte_offset);
 }
 
-UAny IREmitter::GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
-                        bool is_signed) {
+Value IREmitter::GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
+                         bool is_signed) {
     switch (bitsize) {
     case 8:
         return Inst<U32>(is_signed ? Opcode::GetCbufS8 : Opcode::GetCbufU8, binding, byte_offset);
@@ -172,7 +172,7 @@ UAny IREmitter::GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsi
     case 32:
         return Inst<U32>(Opcode::GetCbufU32, binding, byte_offset);
     case 64:
-        return Inst<U64>(Opcode::GetCbufU64, binding, byte_offset);
+        return Inst(Opcode::GetCbufU32x2, binding, byte_offset);
     default:
         throw InvalidArgument("Invalid bit size {}", bitsize);
     }
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index 14b743975..81a57fefe 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -56,8 +56,8 @@ public:
     void SetIndirectBranchVariable(const U32& value);
 
     [[nodiscard]] U32 GetCbuf(const U32& binding, const U32& byte_offset);
-    [[nodiscard]] UAny GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
-                               bool is_signed);
+    [[nodiscard]] Value GetCbuf(const U32& binding, const U32& byte_offset, size_t bitsize,
+                                bool is_signed);
     [[nodiscard]] F32 GetFloatCbuf(const U32& binding, const U32& byte_offset);
 
     [[nodiscard]] U1 GetZFlag();
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index 3640a5d24..734f5328b 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -40,7 +40,7 @@ OPCODE(GetCbufU16,                                          U32,            U32,
 OPCODE(GetCbufS16,                                          U32,            U32,            U32,                                                            )
 OPCODE(GetCbufU32,                                          U32,            U32,            U32,                                                            )
 OPCODE(GetCbufF32,                                          F32,            U32,            U32,                                                            )
-OPCODE(GetCbufU64,                                          U64,            U32,            U32,                                                            )
+OPCODE(GetCbufU32x2,                                        U32x2,          U32,            U32,                                                            )
 OPCODE(GetAttribute,                                        F32,            Attribute,                                                                      )
 OPCODE(SetAttribute,                                        Void,           Attribute,      F32,                                                            )
 OPCODE(GetAttributeIndexed,                                 F32,            U32,                                                                            )
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
index 49ccb7d62..ae3ecea32 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/load_constant.cpp
@@ -30,25 +30,25 @@ void TranslatorVisitor::LDC(u64 insn) {
     const auto [index, offset]{Slot(ir, ldc.mode, imm_index, reg, imm)};
     switch (ldc.size) {
     case Size::U8:
-        X(ldc.dest_reg, ir.GetCbuf(index, offset, 8, false));
+        X(ldc.dest_reg, IR::U32{ir.GetCbuf(index, offset, 8, false)});
         break;
     case Size::S8:
-        X(ldc.dest_reg, ir.GetCbuf(index, offset, 8, true));
+        X(ldc.dest_reg, IR::U32{ir.GetCbuf(index, offset, 8, true)});
         break;
     case Size::U16:
-        X(ldc.dest_reg, ir.GetCbuf(index, offset, 16, false));
+        X(ldc.dest_reg, IR::U32{ir.GetCbuf(index, offset, 16, false)});
         break;
     case Size::S16:
-        X(ldc.dest_reg, ir.GetCbuf(index, offset, 16, true));
+        X(ldc.dest_reg, IR::U32{ir.GetCbuf(index, offset, 16, true)});
         break;
     case Size::B32:
-        X(ldc.dest_reg, ir.GetCbuf(index, offset, 32, false));
+        X(ldc.dest_reg, IR::U32{ir.GetCbuf(index, offset, 32, false)});
         break;
     case Size::B64: {
         if (!IR::IsAligned(ldc.dest_reg, 2)) {
             throw NotImplementedException("Unaligned destination register");
         }
-        const IR::Value vector{ir.UnpackUint2x32(ir.GetCbuf(index, offset, 64, false))};
+        const IR::Value vector{ir.GetCbuf(index, offset, 64, false)};
         for (int i = 0; i < 2; ++i) {
             X(ldc.dest_reg + i, IR::U32{ir.CompositeExtract(vector, i)});
         }