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authorReinUsesLisp <reinuseslisp@airmail.cc>2021-02-23 08:46:39 +0100
committerameerj <52414509+ameerj@users.noreply.github.com>2021-07-23 03:51:22 +0200
commit9d6a98d950da39dd2a7ca5ad25525de4fb825415 (patch)
treeed7374adf60d5330f78d48f0ccea65fd65702fac /src/shader_recompiler/backend
parentshader: FMUL, select, RRO, and MUFU fixes (diff)
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Diffstat (limited to 'src/shader_recompiler/backend')
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv.h4
-rw-r--r--src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp8
2 files changed, 6 insertions, 6 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index 130c71996..4b74cf04d 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -224,8 +224,8 @@ void EmitShiftRightArithmetic32(EmitContext& ctx);
Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b);
Id EmitBitwiseOr32(EmitContext& ctx, Id a, Id b);
Id EmitBitwiseXor32(EmitContext& ctx, Id a, Id b);
-void EmitBitFieldInsert(EmitContext& ctx);
-void EmitBitFieldSExtract(EmitContext& ctx);
+Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count);
+Id EmitBitFieldSExtract(EmitContext& ctx, Id base, Id offset, Id count);
Id EmitBitFieldUExtract(EmitContext& ctx, Id base, Id offset, Id count);
Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs);
Id EmitULessThan(EmitContext& ctx, Id lhs, Id rhs);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 329dcb351..8aaa0e381 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -90,12 +90,12 @@ Id EmitBitwiseXor32(EmitContext& ctx, Id a, Id b) {
return ctx.OpBitwiseXor(ctx.U32[1], a, b);
}
-void EmitBitFieldInsert(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitBitFieldInsert(EmitContext& ctx, Id base, Id insert, Id offset, Id count) {
+ return ctx.OpBitFieldInsert(ctx.U32[1], base, insert, offset, count);
}
-void EmitBitFieldSExtract(EmitContext&) {
- throw NotImplementedException("SPIR-V Instruction");
+Id EmitBitFieldSExtract(EmitContext& ctx, Id base, Id offset, Id count) {
+ return ctx.OpBitFieldSExtract(ctx.U32[1], base, offset, count);
}
Id EmitBitFieldUExtract(EmitContext& ctx, Id base, Id offset, Id count) {