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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-03-20 09:04:12 +0100 |
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committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:23 +0200 |
commit | f91859efd259995806c2944f7941b105b58300d3 (patch) | |
tree | 489e587bcac6c0833c02378a106222c4db107c14 /src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | |
parent | shader: Implement ISCADD (imm) (diff) | |
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Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp')
-rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp index c9de204b0..a9c5e9cca 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp @@ -70,6 +70,10 @@ Id EmitIAbs32(EmitContext& ctx, Id value) { return ctx.OpSAbs(ctx.U32[1], value); } +Id EmitIAbs64(EmitContext& ctx, Id value) { + return ctx.OpSAbs(ctx.U64, value); +} + Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) { return ctx.OpShiftLeftLogical(ctx.U32[1], base, shift); } |