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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2021-02-22 06:45:50 +0100 |
---|---|---|
committer | ameerj <52414509+ameerj@users.noreply.github.com> | 2021-07-23 03:51:22 +0200 |
commit | 18a766b3622baa40596490dbd4912f94e9980a76 (patch) | |
tree | de34dbbbd81f6f980308b165a812445b224bd8fb /src/shader_recompiler/backend/spirv/emit_spirv.h | |
parent | spirv: Fixes and Intel specific workarounds (diff) | |
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Diffstat (limited to 'src/shader_recompiler/backend/spirv/emit_spirv.h')
-rw-r--r-- | src/shader_recompiler/backend/spirv/emit_spirv.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h index cec80c13e..1b9be445e 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv.h @@ -181,8 +181,8 @@ void EmitIAdd64(EmitContext& ctx); Id EmitISub32(EmitContext& ctx, Id a, Id b); void EmitISub64(EmitContext& ctx); Id EmitIMul32(EmitContext& ctx, Id a, Id b); -void EmitINeg32(EmitContext& ctx); -void EmitIAbs32(EmitContext& ctx); +Id EmitINeg32(EmitContext& ctx, Id value); +Id EmitIAbs32(EmitContext& ctx, Id value); Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift); void EmitShiftRightLogical32(EmitContext& ctx); void EmitShiftRightArithmetic32(EmitContext& ctx); |