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authorbunnei <bunneidev@gmail.com>2016-03-22 13:38:48 +0100
committerbunnei <bunneidev@gmail.com>2016-03-22 13:38:48 +0100
commite16899783d6ad6a81f330164af0f81102485c12b (patch)
treea50b52e1a1f2f5787e54dba46cd9c9130f8c14f6 /src/core
parentMerge pull request #1559 from lioncash/vec (diff)
parentarmstate: Correct FIQ register banking (diff)
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Diffstat (limited to 'src/core')
-rw-r--r--src/core/arm/skyeye_common/armstate.cpp7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/core/arm/skyeye_common/armstate.cpp b/src/core/arm/skyeye_common/armstate.cpp
index 2d814345a..5550c112e 100644
--- a/src/core/arm/skyeye_common/armstate.cpp
+++ b/src/core/arm/skyeye_common/armstate.cpp
@@ -2,6 +2,7 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
+#include <algorithm>
#include "common/swap.h"
#include "common/logging/log.h"
#include "core/memory.h"
@@ -48,8 +49,7 @@ void ARMul_State::ChangePrivilegeMode(u32 new_mode)
Spsr[UNDEFBANK] = Spsr_copy;
break;
case FIQ32MODE:
- Reg_firq[0] = Reg[13];
- Reg_firq[1] = Reg[14];
+ std::copy(Reg.begin() + 8, Reg.end() - 1, Reg_firq.begin());
Spsr[FIQBANK] = Spsr_copy;
break;
}
@@ -85,8 +85,7 @@ void ARMul_State::ChangePrivilegeMode(u32 new_mode)
Bank = UNDEFBANK;
break;
case FIQ32MODE:
- Reg[13] = Reg_firq[0];
- Reg[14] = Reg_firq[1];
+ std::copy(Reg_firq.begin(), Reg_firq.end(), Reg.begin() + 8);
Spsr_copy = Spsr[FIQBANK];
Bank = FIQBANK;
break;