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| author | Lioncash <mathew1800@gmail.com> | 2015-01-05 16:40:58 +0100 |
|---|---|---|
| committer | Lioncash <mathew1800@gmail.com> | 2015-01-05 16:41:02 +0100 |
| commit | e08a39a2f44baca69a23b923c25e043773b2d241 (patch) | |
| tree | 74862843978e0d0a9c1aa7f2cc8f2122125a2f99 /src/core | |
| parent | Merge pull request #418 from lioncash/qd (diff) | |
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Diffstat (limited to 'src/core')
| -rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index ffe05cdbc..ed2de115a 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -5571,7 +5571,8 @@ unsigned InterpreterMainLoop(ARMul_State* state) { operand2 = (BIT(RS, 31)) ? (BITS(RS, 16, 31) | 0xffff0000) : BITS(RS, 16, 31); RD = operand1 * operand2 + RN; - // TODO: FIXME: UPDATE Q FLAGS + if (AddOverflow(operand1 * operand2, RN, RD)) + cpu->Cpsr |= (1 << 27); } cpu->Reg[15] += GET_INST_SIZE(cpu); INC_PC(sizeof(smla_inst)); |