summaryrefslogtreecommitdiffstats
path: root/src/core
diff options
context:
space:
mode:
authorbunnei <bunneidev@gmail.com>2018-07-21 20:38:16 +0200
committerGitHub <noreply@github.com>2018-07-21 20:38:16 +0200
commitde7cb91995666db7c469feab7bfe90be2156173d (patch)
tree5009c848fbc5d75c3612387564ac41267e19d96f /src/core
parentMerge pull request #756 from lioncash/dynarmic (diff)
parentarm_interface: Remove unused tls_address member of ThreadContext (diff)
downloadyuzu-de7cb91995666db7c469feab7bfe90be2156173d.tar
yuzu-de7cb91995666db7c469feab7bfe90be2156173d.tar.gz
yuzu-de7cb91995666db7c469feab7bfe90be2156173d.tar.bz2
yuzu-de7cb91995666db7c469feab7bfe90be2156173d.tar.lz
yuzu-de7cb91995666db7c469feab7bfe90be2156173d.tar.xz
yuzu-de7cb91995666db7c469feab7bfe90be2156173d.tar.zst
yuzu-de7cb91995666db7c469feab7bfe90be2156173d.zip
Diffstat (limited to 'src/core')
-rw-r--r--src/core/arm/arm_interface.h3
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.cpp2
-rw-r--r--src/core/arm/unicorn/arm_unicorn.cpp4
3 files changed, 0 insertions, 9 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index 28a99defe..b0d7ced7f 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -20,9 +20,6 @@ public:
u64 cpsr;
std::array<u128, 32> fpu_registers;
u64 fpscr;
-
- // TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
- VAddr tls_address;
};
/// Runs the CPU until an event happens
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp
index df47d5ee8..5d7efc9b6 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic.cpp
@@ -211,7 +211,6 @@ void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
ctx.cpsr = jit->GetPstate();
ctx.fpu_registers = jit->GetVectors();
ctx.fpscr = jit->GetFpcr();
- ctx.tls_address = cb->tpidrro_el0;
}
void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
@@ -221,7 +220,6 @@ void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
jit->SetPstate(static_cast<u32>(ctx.cpsr));
jit->SetVectors(ctx.fpu_registers);
jit->SetFpcr(static_cast<u32>(ctx.fpscr));
- cb->tpidrro_el0 = ctx.tls_address;
}
void ARM_Dynarmic::PrepareReschedule() {
diff --git a/src/core/arm/unicorn/arm_unicorn.cpp b/src/core/arm/unicorn/arm_unicorn.cpp
index 44a46bf04..4c11f35a4 100644
--- a/src/core/arm/unicorn/arm_unicorn.cpp
+++ b/src/core/arm/unicorn/arm_unicorn.cpp
@@ -230,8 +230,6 @@ void ARM_Unicorn::SaveContext(ARM_Interface::ThreadContext& ctx) {
CHECKED(uc_reg_read_batch(uc, uregs, tregs, 31));
- ctx.tls_address = GetTlsAddress();
-
for (int i = 0; i < 32; ++i) {
uregs[i] = UC_ARM64_REG_Q0 + i;
tregs[i] = &ctx.fpu_registers[i];
@@ -259,8 +257,6 @@ void ARM_Unicorn::LoadContext(const ARM_Interface::ThreadContext& ctx) {
CHECKED(uc_reg_write_batch(uc, uregs, tregs, 31));
- SetTlsAddress(ctx.tls_address);
-
for (auto i = 0; i < 32; ++i) {
uregs[i] = UC_ARM64_REG_Q0 + i;
tregs[i] = (void*)&ctx.fpu_registers[i];