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authorLioncash <mathew1800@gmail.com>2015-01-03 00:23:21 +0100
committerLioncash <mathew1800@gmail.com>2015-01-03 00:29:36 +0100
commitbee4ff8454d21644f731703173f449dfeda0fec4 (patch)
treeb03b1340fe531171f90dc09bebe71bf288f4ac6d /src/core
parentdyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD (diff)
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Diffstat (limited to 'src/core')
-rw-r--r--src/core/arm/interpreter/armemu.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/core/arm/interpreter/armemu.cpp b/src/core/arm/interpreter/armemu.cpp
index 40e4837d8..12166bf79 100644
--- a/src/core/arm/interpreter/armemu.cpp
+++ b/src/core/arm/interpreter/armemu.cpp
@@ -6480,9 +6480,13 @@ L_stm_s_takeabort:
// SMUSD and SMLSD
else {
state->Reg[rd_idx] = product1 - product2;
-
- if (BITS(12, 15) != 15)
+
+ if (BITS(12, 15) != 15) {
state->Reg[rd_idx] += state->Reg[ra_idx];
+
+ if (ARMul_AddOverflowQ(product1 - product2, state->Reg[ra_idx]))
+ SETQ;
+ }
}
return 1;