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authorbunnei <bunneidev@gmail.com>2018-01-07 06:58:06 +0100
committerbunnei <bunneidev@gmail.com>2018-01-07 06:58:06 +0100
commit79e0dd249e2cff0a0554663a050c1b35499cc13e (patch)
treeb7384d673add9b2a8dd19183f8660de549a646d4 /src/core
parentsvc: Implement svcWaitProcessWideKeyAtomic. (diff)
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Diffstat (limited to 'src/core')
-rw-r--r--src/core/core_timing.cpp2
-rw-r--r--src/core/core_timing.h2
-rw-r--r--src/core/hw/gpu.cpp2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/core/core_timing.cpp b/src/core/core_timing.cpp
index 5e2a5d00f..c90e62385 100644
--- a/src/core/core_timing.cpp
+++ b/src/core/core_timing.cpp
@@ -13,7 +13,7 @@
#include "core/core.h"
#include "core/core_timing.h"
-int g_clock_rate_arm11 = BASE_CLOCK_RATE_ARM11;
+int g_clock_rate_arm11 = BASE_CLOCK_RATE;
// is this really necessary?
#define INITIAL_SLICE_LENGTH 20000
diff --git a/src/core/core_timing.h b/src/core/core_timing.h
index 897350801..92c811af6 100644
--- a/src/core/core_timing.h
+++ b/src/core/core_timing.h
@@ -21,7 +21,7 @@
// inside callback:
// ScheduleEvent(periodInCycles - cycles_late, callback, "whatever")
-constexpr int BASE_CLOCK_RATE_ARM11 = 268123480;
+constexpr int BASE_CLOCK_RATE = 383778816; // Switch clock speed is 384MHz docked
extern int g_clock_rate_arm11;
inline s64 msToCycles(int ms) {
diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp
index c828a776e..4826d9c79 100644
--- a/src/core/hw/gpu.cpp
+++ b/src/core/hw/gpu.cpp
@@ -29,7 +29,7 @@ namespace GPU {
Regs g_regs;
/// 268MHz CPU clocks / 60Hz frames per second
-const u64 frame_ticks = static_cast<u64>(BASE_CLOCK_RATE_ARM11 / SCREEN_REFRESH_RATE);
+const u64 frame_ticks = static_cast<u64>(BASE_CLOCK_RATE / SCREEN_REFRESH_RATE);
/// Event id for CoreTiming
static int vblank_event;