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authorMerryMage <MerryMage@users.noreply.github.com>2016-08-14 01:49:34 +0200
committerMerryMage <MerryMage@users.noreply.github.com>2016-08-14 01:49:34 +0200
commit50407a8dc86685d6f261680162823dfc44377285 (patch)
tree75f19adc5a46334a3794221dabc8624b3bb6ceeb /src/core/arm
parentMerge pull request #1936 from jroweboy/qt5.7-fix (diff)
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Diffstat (limited to 'src/core/arm')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index 01d5d478e..6d5fb7aec 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -3228,7 +3228,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
addr += 4;
}
if (BIT(inst_cream->inst, 15)) {
- cpu->WriteMemory32(addr, cpu->Reg_usr[1] + 8);
+ cpu->WriteMemory32(addr, cpu->Reg[15] + 8);
}
} else {
for (int i = 0; i < 15; i++) {
@@ -3243,8 +3243,9 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
}
// Check PC reg
- if (BIT(inst_cream->inst, 15))
- cpu->WriteMemory32(addr, cpu->Reg_usr[1] + 8);
+ if (BIT(inst_cream->inst, 15)) {
+ cpu->WriteMemory32(addr, cpu->Reg[15] + 8);
+ }
}
}
cpu->Reg[15] += cpu->GetInstructionSize();