summaryrefslogtreecommitdiffstats
path: root/src/core/arm
diff options
context:
space:
mode:
authorpolaris- <nagatospam@gmail.com>2015-09-02 14:56:38 +0200
committerpolaris- <nagatospam@gmail.com>2015-10-04 17:16:59 +0200
commit31dee93e849d79a91f280faf16941806e3cb3c6b (patch)
tree22f64217b38dfa38b25a772f9fc5a9b025e1cbd6 /src/core/arm
parentOS X build uploading: auto-confirm SSH host key (diff)
downloadyuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar
yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar.gz
yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar.bz2
yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar.lz
yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar.xz
yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.tar.zst
yuzu-31dee93e849d79a91f280faf16941806e3cb3c6b.zip
Diffstat (limited to 'src/core/arm')
-rw-r--r--src/core/arm/dyncom/arm_dyncom_interpreter.cpp41
-rw-r--r--src/core/arm/skyeye_common/armstate.cpp35
-rw-r--r--src/core/arm/skyeye_common/armstate.h2
3 files changed, 69 insertions, 9 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index fbd6f94f9..8293f4c60 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -23,6 +23,8 @@
#include "core/arm/skyeye_common/armsupp.h"
#include "core/arm/skyeye_common/vfp/vfp.h"
+#include "core/gdbstub/gdbstub.h"
+
Common::Profiling::TimingCategory profile_execute("DynCom::Execute");
Common::Profiling::TimingCategory profile_decode("DynCom::Decode");
@@ -3548,6 +3550,7 @@ static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, u32 addr) {
CITRA_IGNORE_EXIT(-1);
}
inst_base = arm_instruction_trans[idx](inst, idx);
+
translated:
phys_addr += inst_size;
@@ -3580,6 +3583,8 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
Common::Profiling::ScopeTimer timer_execute(profile_execute);
MICROPROFILE_SCOPE(DynCom_Execute);
+ int breakpoint_offset = -1;
+
#undef RM
#undef RS
@@ -3604,15 +3609,27 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
#define INC_PC(l) ptr += sizeof(arm_inst) + l
#define INC_PC_STUB ptr += sizeof(arm_inst)
+#define GDB_BP_CHECK \
+ cpu->Cpsr &= ~(1 << 5); \
+ cpu->Cpsr |= cpu->TFlag << 5; \
+ if (GDBStub::g_server_enabled) { \
+ if (GDBStub::IsMemoryBreak() || PC == breakpoint_offset) { \
+ GDBStub::Break(); \
+ goto END; \
+ } \
+ }
+
// GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback to a
// clunky switch statement.
#if defined __GNUC__ || defined __clang__
#define GOTO_NEXT_INST \
+ GDB_BP_CHECK; \
if (num_instrs >= cpu->NumInstrsToExecute) goto END; \
num_instrs++; \
goto *InstLabel[inst_base->idx]
#else
#define GOTO_NEXT_INST \
+ GDB_BP_CHECK; \
if (num_instrs >= cpu->NumInstrsToExecute) goto END; \
num_instrs++; \
switch(inst_base->idx) { \
@@ -3878,6 +3895,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
unsigned int addr;
unsigned int num_instrs = 0;
+
int ptr;
LOAD_NZCVT;
@@ -3903,6 +3921,11 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
goto END;
}
+ // Find breakpoint if one exists within the block
+ if (GDBStub::g_server_enabled && GDBStub::IsConnected()) {
+ breakpoint_offset = GDBStub::GetNextBreakpointFromAddress(cpu->Reg[15], GDBStub::BreakpointType::Execute);
+ }
+
inst_base = (arm_inst *)&inst_buf[ptr];
GOTO_NEXT_INST;
}
@@ -4454,7 +4477,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
inst_cream->get_addr(cpu, inst_cream->inst, addr);
- cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr);
+ cpu->Reg[BITS(inst_cream->inst, 12, 15)] = cpu->ReadMemory8(addr);
if (BITS(inst_cream->inst, 12, 15) == 15) {
INC_PC(sizeof(ldst_inst));
@@ -4472,7 +4495,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
inst_cream->get_addr(cpu, inst_cream->inst, addr);
- cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read8(addr);
+ cpu->Reg[BITS(inst_cream->inst, 12, 15)] = cpu->ReadMemory8(addr);
if (BITS(inst_cream->inst, 12, 15) == 15) {
INC_PC(sizeof(ldst_inst));
@@ -4531,7 +4554,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
cpu->SetExclusiveMemoryAddress(read_addr);
- RD = Memory::Read8(read_addr);
+ RD = cpu->ReadMemory8(read_addr);
if (inst_cream->Rd == 15) {
INC_PC(sizeof(generic_arm_inst));
goto DISPATCH;
@@ -4604,7 +4627,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
inst_cream->get_addr(cpu, inst_cream->inst, addr);
- unsigned int value = Memory::Read8(addr);
+ unsigned int value = cpu->ReadMemory8(addr);
if (BIT(value, 7)) {
value |= 0xffffff00;
}
@@ -6027,7 +6050,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
inst_cream->get_addr(cpu, inst_cream->inst, addr);
unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff;
- Memory::Write8(addr, value);
+ cpu->WriteMemory8(addr, value);
}
cpu->Reg[15] += cpu->GetInstructionSize();
INC_PC(sizeof(ldst_inst));
@@ -6040,7 +6063,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
inst_cream->get_addr(cpu, inst_cream->inst, addr);
unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xff;
- Memory::Write8(addr, value);
+ cpu->WriteMemory8(addr, value);
}
cpu->Reg[15] += cpu->GetInstructionSize();
INC_PC(sizeof(ldst_inst));
@@ -6091,7 +6114,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
if (cpu->IsExclusiveMemoryAccess(write_addr)) {
cpu->UnsetExclusiveMemoryAddress();
- Memory::Write8(write_addr, cpu->Reg[inst_cream->Rm]);
+ cpu->WriteMemory8(write_addr, cpu->Reg[inst_cream->Rm]);
RD = 0;
} else {
// Failed to write due to mutex access
@@ -6250,8 +6273,8 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
swp_inst* inst_cream = (swp_inst*)inst_base->component;
addr = RN;
- unsigned int value = Memory::Read8(addr);
- Memory::Write8(addr, (RM & 0xFF));
+ unsigned int value = cpu->ReadMemory8(addr);
+ cpu->WriteMemory8(addr, (RM & 0xFF));
RD = value;
}
cpu->Reg[15] += cpu->GetInstructionSize();
diff --git a/src/core/arm/skyeye_common/armstate.cpp b/src/core/arm/skyeye_common/armstate.cpp
index 0491717dc..2d814345a 100644
--- a/src/core/arm/skyeye_common/armstate.cpp
+++ b/src/core/arm/skyeye_common/armstate.cpp
@@ -7,6 +7,7 @@
#include "core/memory.h"
#include "core/arm/skyeye_common/armstate.h"
#include "core/arm/skyeye_common/vfp/vfp.h"
+#include "core/gdbstub/gdbstub.h"
ARMul_State::ARMul_State(PrivilegeMode initial_mode)
{
@@ -185,8 +186,25 @@ void ARMul_State::ResetMPCoreCP15Registers()
CP15[CP15_TLB_DEBUG_CONTROL] = 0x00000000;
}
+static void CheckMemoryBreakpoint(u32 address, GDBStub::BreakpointType type)
+{
+ if (GDBStub::g_server_enabled && GDBStub::CheckBreakpoint(address, type)) {
+ LOG_DEBUG(Debug, "Found memory breakpoint @ %08x", address);
+ GDBStub::Break(true);
+ }
+}
+
+u8 ARMul_State::ReadMemory8(u32 address) const
+{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
+
+ return Memory::Read8(address);
+}
+
u16 ARMul_State::ReadMemory16(u32 address) const
{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
+
u16 data = Memory::Read16(address);
if (InBigEndianMode())
@@ -197,6 +215,8 @@ u16 ARMul_State::ReadMemory16(u32 address) const
u32 ARMul_State::ReadMemory32(u32 address) const
{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
+
u32 data = Memory::Read32(address);
if (InBigEndianMode())
@@ -207,6 +227,8 @@ u32 ARMul_State::ReadMemory32(u32 address) const
u64 ARMul_State::ReadMemory64(u32 address) const
{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
+
u64 data = Memory::Read64(address);
if (InBigEndianMode())
@@ -215,8 +237,17 @@ u64 ARMul_State::ReadMemory64(u32 address) const
return data;
}
+void ARMul_State::WriteMemory8(u32 address, u8 data)
+{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Write);
+
+ Memory::Write8(address, data);
+}
+
void ARMul_State::WriteMemory16(u32 address, u16 data)
{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Write);
+
if (InBigEndianMode())
data = Common::swap16(data);
@@ -225,6 +256,8 @@ void ARMul_State::WriteMemory16(u32 address, u16 data)
void ARMul_State::WriteMemory32(u32 address, u32 data)
{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Write);
+
if (InBigEndianMode())
data = Common::swap32(data);
@@ -233,6 +266,8 @@ void ARMul_State::WriteMemory32(u32 address, u32 data)
void ARMul_State::WriteMemory64(u32 address, u64 data)
{
+ CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Write);
+
if (InBigEndianMode())
data = Common::swap64(data);
diff --git a/src/core/arm/skyeye_common/armstate.h b/src/core/arm/skyeye_common/armstate.h
index ceb159d14..98dad9b1f 100644
--- a/src/core/arm/skyeye_common/armstate.h
+++ b/src/core/arm/skyeye_common/armstate.h
@@ -153,9 +153,11 @@ public:
// Reads/writes data in big/little endian format based on the
// state of the E (endian) bit in the APSR.
+ u8 ReadMemory8(u32 address) const;
u16 ReadMemory16(u32 address) const;
u32 ReadMemory32(u32 address) const;
u64 ReadMemory64(u32 address) const;
+ void WriteMemory8(u32 address, u8 data);
void WriteMemory16(u32 address, u16 data);
void WriteMemory32(u32 address, u32 data);
void WriteMemory64(u32 address, u64 data);