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authorbunnei <bunneidev@gmail.com>2018-06-05 16:09:35 +0200
committerGitHub <noreply@github.com>2018-06-05 16:09:35 +0200
commit38eb33f150a8bef4e6be883b1e153fabb21d4384 (patch)
tree71cfa84d723526232f7b7203e779b3079a24c597
parentMerge pull request #520 from bunnei/shader-shl (diff)
parentGPU: Corrected the branch targets for the shader bra instruction. (diff)
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-rw-r--r--src/video_core/engines/shader_bytecode.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h
index ef749937e..38757c038 100644
--- a/src/video_core/engines/shader_bytecode.h
+++ b/src/video_core/engines/shader_bytecode.h
@@ -325,15 +325,16 @@ union Instruction {
} texs;
union {
- BitField<20, 5, u64> target;
+ BitField<20, 24, u64> target;
BitField<5, 1, u64> constant_buffer;
s32 GetBranchTarget() const {
// Sign extend the branch target offset
- u32 mask = 1U << (5 - 1);
+ u32 mask = 1U << (24 - 1);
u32 value = static_cast<u32>(target);
- // The branch offset is relative to the next instruction, so add 1 to it.
- return static_cast<s32>((value ^ mask) - mask) + 1;
+ // The branch offset is relative to the next instruction and is stored in bytes, so
+ // divide it by the size of an instruction and add 1 to it.
+ return static_cast<s32>((value ^ mask) - mask) / sizeof(Instruction) + 1;
}
} bra;