summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorbunnei <bunneidev@gmail.com>2018-04-24 21:30:22 +0200
committerbunnei <bunneidev@gmail.com>2018-04-25 04:31:46 +0200
commit0a023cfb4ff5631520ad8d4409dcf8e2a103fd98 (patch)
tree1aca0bb5e19b187f6eda2e5b5601fd526b0f453e
parentgl_rasterizer_cache: Use new logger. (diff)
downloadyuzu-0a023cfb4ff5631520ad8d4409dcf8e2a103fd98.tar
yuzu-0a023cfb4ff5631520ad8d4409dcf8e2a103fd98.tar.gz
yuzu-0a023cfb4ff5631520ad8d4409dcf8e2a103fd98.tar.bz2
yuzu-0a023cfb4ff5631520ad8d4409dcf8e2a103fd98.tar.lz
yuzu-0a023cfb4ff5631520ad8d4409dcf8e2a103fd98.tar.xz
yuzu-0a023cfb4ff5631520ad8d4409dcf8e2a103fd98.tar.zst
yuzu-0a023cfb4ff5631520ad8d4409dcf8e2a103fd98.zip
-rw-r--r--src/video_core/renderer_opengl/gl_rasterizer_cache.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp b/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp
index 9348b0297..aef1c5979 100644
--- a/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp
+++ b/src/video_core/renderer_opengl/gl_rasterizer_cache.cpp
@@ -1428,9 +1428,9 @@ void RasterizerCacheOpenGL::UnregisterSurface(const Surface& surface) {
}
void RasterizerCacheOpenGL::UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 size, int delta) {
- const u64 num_pages =
- ((addr + size - 1) >> Memory::PAGE_BITS) - (addr >> Memory::PAGE_BITS) + 1;
- const u64 page_start = addr >> Memory::PAGE_BITS;
+ const u64 num_pages = ((addr + size - 1) >> Tegra::MemoryManager::PAGE_BITS) -
+ (addr >> Tegra::MemoryManager::PAGE_BITS) + 1;
+ const u64 page_start = addr >> Tegra::MemoryManager::PAGE_BITS;
const u64 page_end = page_start + num_pages;
// Interval maps will erase segments if count reaches 0, so if delta is negative we have to
@@ -1444,9 +1444,9 @@ void RasterizerCacheOpenGL::UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 siz
const int count = pair.second;
const Tegra::GPUVAddr interval_start_addr = boost::icl::first(interval)
- << Memory::PAGE_BITS;
+ << Tegra::MemoryManager::PAGE_BITS;
const Tegra::GPUVAddr interval_end_addr = boost::icl::last_next(interval)
- << Memory::PAGE_BITS;
+ << Tegra::MemoryManager::PAGE_BITS;
const u64 interval_size = interval_end_addr - interval_start_addr;
if (delta > 0 && count == delta)