// Copyright 2021 yuzu Emulator Project // Licensed under GPLv2 or any later version // Refer to the license.txt file included. #include #include #include "shader_recompiler/backend/spirv/emit_spirv.h" #include "shader_recompiler/frontend/ir/basic_block.h" #include "shader_recompiler/frontend/ir/function.h" #include "shader_recompiler/frontend/ir/microinstruction.h" #include "shader_recompiler/frontend/ir/program.h" namespace Shader::Backend::SPIRV { namespace { template struct FuncTraits : FuncTraits {}; template struct FuncTraits { using ReturnType = ReturnType_; static constexpr size_t NUM_ARGS = sizeof...(Args); template using ArgType = std::tuple_element_t>; }; template void SetDefinition(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst, Args... args) { const Id forward_id{inst->Definition()}; const bool has_forward_id{Sirit::ValidId(forward_id)}; Id current_id{}; if (has_forward_id) { current_id = ctx.ExchangeCurrentId(forward_id); } const Id new_id{(emit.*method)(ctx, std::forward(args)...)}; if (has_forward_id) { ctx.ExchangeCurrentId(current_id); } else { inst->SetDefinition(new_id); } } template ArgType Arg(EmitContext& ctx, const IR::Value& arg) { if constexpr (std::is_same_v) { return ctx.Def(arg); } else if constexpr (std::is_same_v) { return arg; } else if constexpr (std::is_same_v) { return arg.U32(); } else if constexpr (std::is_same_v) { return arg.Label(); } } template void Invoke(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst, std::index_sequence) { using Traits = FuncTraits; if constexpr (std::is_same_v) { if constexpr (is_first_arg_inst) { SetDefinition(emit, ctx, inst, inst, Arg>(ctx, inst->Arg(I))...); } else { SetDefinition(emit, ctx, inst, Arg>(ctx, inst->Arg(I))...); } } else { if constexpr (is_first_arg_inst) { (emit.*method)(ctx, inst, Arg>(ctx, inst->Arg(I))...); } else { (emit.*method)(ctx, Arg>(ctx, inst->Arg(I))...); } } } template void Invoke(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst) { using Traits = FuncTraits; static_assert(Traits::NUM_ARGS >= 1, "Insufficient arguments"); if constexpr (Traits::NUM_ARGS == 1) { Invoke(emit, ctx, inst, std::make_index_sequence<0>{}); } else { using FirstArgType = typename Traits::template ArgType<1>; static constexpr bool is_first_arg_inst = std::is_same_v; using Indices = std::make_index_sequence; Invoke(emit, ctx, inst, Indices{}); } } } // Anonymous namespace EmitSPIRV::EmitSPIRV(IR::Program& program) { EmitContext ctx{program}; const Id void_function{ctx.TypeFunction(ctx.void_id)}; // FIXME: Forward declare functions (needs sirit support) Id func{}; for (IR::Function& function : program.functions) { func = ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function); for (IR::Block* const block : function.blocks) { ctx.AddLabel(block->Definition()); for (IR::Inst& inst : block->Instructions()) { EmitInst(ctx, &inst); } } ctx.OpFunctionEnd(); } boost::container::small_vector interfaces; if (program.info.uses_workgroup_id) { interfaces.push_back(ctx.workgroup_id); } if (program.info.uses_local_invocation_id) { interfaces.push_back(ctx.local_invocation_id); } const std::span interfaces_span(interfaces.data(), interfaces.size()); ctx.AddEntryPoint(spv::ExecutionModel::Fragment, func, "main", interfaces_span); ctx.AddExecutionMode(func, spv::ExecutionMode::OriginUpperLeft); std::vector result{ctx.Assemble()}; std::FILE* file{std::fopen("D:\\shader.spv", "wb")}; std::fwrite(result.data(), sizeof(u32), result.size(), file); std::fclose(file); std::system("spirv-dis D:\\shader.spv") == 0 && std::system("spirv-val --uniform-buffer-standard-layout D:\\shader.spv") == 0 && std::system("spirv-cross -V D:\\shader.spv") == 0; } void EmitSPIRV::EmitInst(EmitContext& ctx, IR::Inst* inst) { switch (inst->Opcode()) { #define OPCODE(name, result_type, ...) \ case IR::Opcode::name: \ return Invoke<&EmitSPIRV::Emit##name>(*this, ctx, inst); #include "shader_recompiler/frontend/ir/opcodes.inc" #undef OPCODE } throw LogicError("Invalid opcode {}", inst->Opcode()); } static Id TypeId(const EmitContext& ctx, IR::Type type) { switch (type) { case IR::Type::U1: return ctx.U1; case IR::Type::U32: return ctx.U32[1]; default: throw NotImplementedException("Phi node type {}", type); } } Id EmitSPIRV::EmitPhi(EmitContext& ctx, IR::Inst* inst) { const size_t num_args{inst->NumArgs()}; boost::container::small_vector operands; operands.reserve(num_args * 2); for (size_t index = 0; index < num_args; ++index) { // Phi nodes can have forward declarations, if an argument is not defined provide a forward // declaration of it. Invoke will take care of giving it the right definition when it's // actually defined. const IR::Value arg{inst->Arg(index)}; Id def{}; if (arg.IsImmediate()) { // Let the context handle immediate definitions, as it already knows how def = ctx.Def(arg); } else { IR::Inst* const arg_inst{arg.Inst()}; def = arg_inst->Definition(); if (!Sirit::ValidId(def)) { // If it hasn't been defined, get a forward declaration def = ctx.ForwardDeclarationId(); arg_inst->SetDefinition(def); } } IR::Block* const phi_block{inst->PhiBlock(index)}; operands.push_back(def); operands.push_back(phi_block->Definition()); } const Id result_type{TypeId(ctx, inst->Arg(0).Type())}; return ctx.OpPhi(result_type, std::span(operands.data(), operands.size())); } void EmitSPIRV::EmitVoid(EmitContext&) {} void EmitSPIRV::EmitIdentity(EmitContext&) { throw NotImplementedException("SPIR-V Instruction"); } void EmitSPIRV::EmitGetZeroFromOp(EmitContext&) { throw LogicError("Unreachable instruction"); } void EmitSPIRV::EmitGetSignFromOp(EmitContext&) { throw LogicError("Unreachable instruction"); } void EmitSPIRV::EmitGetCarryFromOp(EmitContext&) { throw LogicError("Unreachable instruction"); } void EmitSPIRV::EmitGetOverflowFromOp(EmitContext&) { throw LogicError("Unreachable instruction"); } } // namespace Shader::Backend::SPIRV