From c85d7ccd79fb69bc096cd19bb8f95ac9534ffc23 Mon Sep 17 00:00:00 2001
From: Fernando Sahmkow <fsahmkow27@gmail.com>
Date: Sun, 24 Dec 2023 21:49:54 +0100
Subject: SMMU: Implement backing CPU page protect/unprotect

---
 src/video_core/host1x/gpu_device_memory_manager.cpp | 11 +++++++++++
 src/video_core/host1x/gpu_device_memory_manager.h   |  3 +++
 2 files changed, 14 insertions(+)

(limited to 'src/video_core')

diff --git a/src/video_core/host1x/gpu_device_memory_manager.cpp b/src/video_core/host1x/gpu_device_memory_manager.cpp
index 2ca445081..668c2f08b 100644
--- a/src/video_core/host1x/gpu_device_memory_manager.cpp
+++ b/src/video_core/host1x/gpu_device_memory_manager.cpp
@@ -5,6 +5,17 @@
 #include "video_core/host1x/gpu_device_memory_manager.h"
 #include "video_core/rasterizer_interface.h"
 
+namespace Tegra {
+
+struct MaxwellDeviceMethods {
+    static inline void MarkRegionCaching(Core::Memory::Memory* interface, VAddr address,
+                                         size_t size, bool caching) {
+        interface->RasterizerMarkRegionCached(address, size, caching);
+    }
+};
+
+} // namespace Tegra
+
 template struct Core::DeviceMemoryManagerAllocator<Tegra::MaxwellDeviceTraits>;
 template class Core::DeviceMemoryManager<Tegra::MaxwellDeviceTraits>;
 
diff --git a/src/video_core/host1x/gpu_device_memory_manager.h b/src/video_core/host1x/gpu_device_memory_manager.h
index 30ad52017..2fb77605e 100644
--- a/src/video_core/host1x/gpu_device_memory_manager.h
+++ b/src/video_core/host1x/gpu_device_memory_manager.h
@@ -9,10 +9,13 @@ class RasterizerInterface;
 
 namespace Tegra {
 
+struct MaxwellDeviceMethods;
+
 struct MaxwellDeviceTraits {
     static constexpr bool supports_pinning = true;
     static constexpr size_t device_virtual_bits = 34;
     using DeviceInterface = typename VideoCore::RasterizerInterface;
+    using DeviceMethods = typename MaxwellDeviceMethods;
 };
 
 using MaxwellDeviceMemoryManager = Core::DeviceMemoryManager<MaxwellDeviceTraits>;
-- 
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