From be51120d237cb551fae90fbfaebda41669c40403 Mon Sep 17 00:00:00 2001
From: Subv <subv2112@gmail.com>
Date: Wed, 6 Jun 2018 23:54:25 -0500
Subject: GPU: Bind and clear the render target when the CLEAR_BUFFERS register
 is written to.

---
 src/video_core/engines/maxwell_3d.cpp | 11 +++++++++++
 1 file changed, 11 insertions(+)

(limited to 'src/video_core/engines')

diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 93c43c8cb..78f1c0ea7 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -126,6 +126,10 @@ void Maxwell3D::WriteReg(u32 method, u32 value, u32 remaining_params) {
         DrawArrays();
         break;
     }
+    case MAXWELL3D_REG_INDEX(clear_buffers): {
+        ProcessClearBuffers();
+        break;
+    }
     case MAXWELL3D_REG_INDEX(query.query_get): {
         ProcessQueryGet();
         break;
@@ -415,5 +419,12 @@ bool Maxwell3D::IsShaderStageEnabled(Regs::ShaderStage stage) const {
     UNREACHABLE();
 }
 
+void Maxwell3D::ProcessClearBuffers() {
+    ASSERT(regs.clear_buffers.R && regs.clear_buffers.G && regs.clear_buffers.B &&
+           regs.clear_buffers.A);
+
+    VideoCore::g_renderer->Rasterizer()->Clear();
+}
+
 } // namespace Engines
 } // namespace Tegra
-- 
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