From f18a6dd1bdaffda4c3e771af3cf7cf41919ebd67 Mon Sep 17 00:00:00 2001
From: FernandoS27 <fsahmkow27@gmail.com>
Date: Fri, 16 Apr 2021 23:52:58 +0200
Subject: shader: Implement SR_Y_DIRECTION

---
 src/shader_recompiler/backend/spirv/emit_spirv.h                   | 1 +
 src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp | 7 +++++++
 src/shader_recompiler/frontend/ir/ir_emitter.cpp                   | 4 ++++
 src/shader_recompiler/frontend/ir/ir_emitter.h                     | 1 +
 src/shader_recompiler/frontend/ir/opcodes.inc                      | 1 +
 .../frontend/maxwell/translate/impl/move_special_register.cpp      | 2 ++
 src/shader_recompiler/profile.h                                    | 2 ++
 7 files changed, 18 insertions(+)

(limited to 'src/shader_recompiler')

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index d43c72f6e..7949d08d0 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -72,6 +72,7 @@ Id EmitLocalInvocationId(EmitContext& ctx);
 Id EmitInvocationId(EmitContext& ctx);
 Id EmitSampleId(EmitContext& ctx);
 Id EmitIsHelperInvocation(EmitContext& ctx);
+Id EmitYDirection(EmitContext& ctx);
 Id EmitLoadLocal(EmitContext& ctx, Id word_offset);
 void EmitWriteLocal(EmitContext& ctx, Id word_offset, Id value);
 Id EmitUndefU1(EmitContext& ctx);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
index e5e4c352b..1030404c0 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -403,6 +403,13 @@ Id EmitIsHelperInvocation(EmitContext& ctx) {
     return ctx.OpLoad(ctx.U1, ctx.is_helper_invocation);
 }
 
+Id EmitYDirection(EmitContext& ctx) {
+    if (ctx.profile.y_negate) {
+        return ctx.Constant(ctx.F32[1], -1.0f);
+    }
+    return ctx.Constant(ctx.F32[1], 1.0f);
+}
+
 Id EmitLoadLocal(EmitContext& ctx, Id word_offset) {
     const Id pointer{ctx.OpAccessChain(ctx.private_u32, ctx.local_memory, word_offset)};
     return ctx.OpLoad(ctx.U32[1], pointer);
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.cpp b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
index aebe7200f..c3e8d0681 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.cpp
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.cpp
@@ -379,6 +379,10 @@ U1 IREmitter::IsHelperInvocation() {
     return Inst<U1>(Opcode::IsHelperInvocation);
 }
 
+F32 IREmitter::YDirection() {
+    return Inst<F32>(Opcode::YDirection);
+}
+
 U32 IREmitter::LaneId() {
     return Inst<U32>(Opcode::LaneId);
 }
diff --git a/src/shader_recompiler/frontend/ir/ir_emitter.h b/src/shader_recompiler/frontend/ir/ir_emitter.h
index b9d051b43..7e67f5e30 100644
--- a/src/shader_recompiler/frontend/ir/ir_emitter.h
+++ b/src/shader_recompiler/frontend/ir/ir_emitter.h
@@ -102,6 +102,7 @@ public:
     [[nodiscard]] U32 InvocationId();
     [[nodiscard]] U32 SampleId();
     [[nodiscard]] U1 IsHelperInvocation();
+    [[nodiscard]] F32 YDirection();
 
     [[nodiscard]] U32 LaneId();
 
diff --git a/src/shader_recompiler/frontend/ir/opcodes.inc b/src/shader_recompiler/frontend/ir/opcodes.inc
index 1cfc2a943..269de8ca5 100644
--- a/src/shader_recompiler/frontend/ir/opcodes.inc
+++ b/src/shader_recompiler/frontend/ir/opcodes.inc
@@ -65,6 +65,7 @@ OPCODE(LocalInvocationId,                                   U32x3,
 OPCODE(InvocationId,                                        U32,                                                                                            )
 OPCODE(SampleId,                                            U32,                                                                                            )
 OPCODE(IsHelperInvocation,                                  U1,                                                                                             )
+OPCODE(YDirection,                                          F32,                                                                                            )
 
 // Undefined
 OPCODE(UndefU1,                                             U1,                                                                                             )
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
index 660b84c20..b0baff74b 100644
--- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
+++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
@@ -150,6 +150,8 @@ enum class SpecialRegister : u64 {
         return ir.SubgroupGtMask();
     case SpecialRegister::SR_GEMASK:
         return ir.SubgroupGeMask();
+    case SpecialRegister::SR_Y_DIRECTION:
+        return ir.BitCast<IR::U32>(ir.YDirection());
     default:
         throw NotImplementedException("S2R special register {}", special_register);
     }
diff --git a/src/shader_recompiler/profile.h b/src/shader_recompiler/profile.h
index a2c2948d5..08242184f 100644
--- a/src/shader_recompiler/profile.h
+++ b/src/shader_recompiler/profile.h
@@ -97,6 +97,8 @@ struct Profile {
     std::optional<CompareFunction> alpha_test_func;
     float alpha_test_reference{};
 
+    bool y_negate{};
+
     std::vector<TransformFeedbackVarying> xfb_varyings;
 };
 
-- 
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