From 5465cb156107a27df525dfedbfd4e920b7f71253 Mon Sep 17 00:00:00 2001
From: ameerj <52414509+ameerj@users.noreply.github.com>
Date: Fri, 5 Mar 2021 01:15:16 -0500
Subject: shader: Implement LEA

---
 src/shader_recompiler/backend/spirv/emit_spirv.h                  | 4 +++-
 .../backend/spirv/emit_spirv_bitwise_conversion.cpp               | 4 ++--
 src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp        | 8 ++++++++
 3 files changed, 13 insertions(+), 3 deletions(-)

(limited to 'src/shader_recompiler/backend')

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv.h b/src/shader_recompiler/backend/spirv/emit_spirv.h
index bed43c094..1f7d84871 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv.h
+++ b/src/shader_recompiler/backend/spirv/emit_spirv.h
@@ -132,7 +132,7 @@ void EmitBitCastU64F64(EmitContext& ctx);
 void EmitBitCastF16U16(EmitContext& ctx);
 Id EmitBitCastF32U32(EmitContext& ctx, Id value);
 void EmitBitCastF64U64(EmitContext& ctx);
-void EmitPackUint2x32(EmitContext& ctx);
+Id EmitPackUint2x32(EmitContext& ctx, Id value);
 Id EmitUnpackUint2x32(EmitContext& ctx, Id value);
 Id EmitPackFloat2x16(EmitContext& ctx, Id value);
 Id EmitUnpackFloat2x16(EmitContext& ctx, Id value);
@@ -229,9 +229,11 @@ Id EmitISub32(EmitContext& ctx, Id a, Id b);
 void EmitISub64(EmitContext& ctx);
 Id EmitIMul32(EmitContext& ctx, Id a, Id b);
 Id EmitINeg32(EmitContext& ctx, Id value);
+Id EmitINeg64(EmitContext& ctx, Id value);
 Id EmitIAbs32(EmitContext& ctx, Id value);
 Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift);
 Id EmitShiftRightLogical32(EmitContext& ctx, Id a, Id b);
+Id EmitShiftRightLogical64(EmitContext& ctx, Id a, Id b);
 Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b);
 Id EmitBitwiseAnd32(EmitContext& ctx, Id a, Id b);
 Id EmitBitwiseOr32(EmitContext& ctx, Id a, Id b);
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
index e0d1ba413..93a45d834 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_bitwise_conversion.cpp
@@ -30,8 +30,8 @@ void EmitBitCastF64U64(EmitContext&) {
     throw NotImplementedException("SPIR-V Instruction");
 }
 
-void EmitPackUint2x32(EmitContext&) {
-    throw NotImplementedException("SPIR-V Instruction");
+Id EmitPackUint2x32(EmitContext& ctx, Id value) {
+    return ctx.OpBitcast(ctx.U64, value);
 }
 
 Id EmitUnpackUint2x32(EmitContext& ctx, Id value) {
diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
index 162fb6a91..f5001cdaa 100644
--- a/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
+++ b/src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp
@@ -62,6 +62,10 @@ Id EmitINeg32(EmitContext& ctx, Id value) {
     return ctx.OpSNegate(ctx.U32[1], value);
 }
 
+Id EmitINeg64(EmitContext& ctx, Id value) {
+    return ctx.OpSNegate(ctx.U64, value);
+}
+
 Id EmitIAbs32(EmitContext& ctx, Id value) {
     return ctx.OpSAbs(ctx.U32[1], value);
 }
@@ -74,6 +78,10 @@ Id EmitShiftRightLogical32(EmitContext& ctx, Id a, Id b) {
     return ctx.OpShiftRightLogical(ctx.U32[1], a, b);
 }
 
+Id EmitShiftRightLogical64(EmitContext& ctx, Id a, Id b) {
+    return ctx.OpShiftRightLogical(ctx.U64, a, b);
+}
+
 Id EmitShiftRightArithmetic32(EmitContext& ctx, Id a, Id b) {
     return ctx.OpShiftRightArithmetic(ctx.U32[1], a, b);
 }
-- 
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