From b64dea80ce5d1413fb5dfcd94f19e77816b6bdf7 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 31 May 2015 03:33:07 -0400 Subject: arm_dyncom_thumb: Implement REV, REV16, and REVSH. --- src/core/arm/dyncom/arm_dyncom_thumb.cpp | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'src/core') diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index 2fc8170be..78552293a 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -274,9 +274,19 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { ? 0xE24DDF00 // SUB : 0xE28DDF00) // ADD |(tinstr & 0x007F); // off7 - } else if ((tinstr & 0x0F00) == 0x0e00) + } else if ((tinstr & 0x0F00) == 0x0e00) { *ainstr = 0xEF000000 | 0x180000; // base | BKPT mask - else { + } else if ((tinstr & 0x0F00) == 0x0a00) { + static const ARMword subset[3] = { + 0xE6BF0F30, // REV + 0xE6BF0FB0, // REV16 + 0xE6FF0FB0, // REVSH + }; + + *ainstr = subset[BITS(tinstr, 6, 7)] // base + | (BITS(tinstr, 0, 2) << 12) // Rd + | BITS(tinstr, 3, 5); // Rm + } else { static const ARMword subset[4] = { 0xE92D0000, // STMDB sp!,{rlist} 0xE92D4000, // STMDB sp!,{rlist,lr} -- cgit v1.2.3 From 7caef19c89662b5c80c4f1ea6d8862dcf7760b17 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 31 May 2015 04:42:39 -0400 Subject: arm_dyncom_thumb: Implement SXTH, SXTB, UXTH, and UXTB. --- src/core/arm/dyncom/arm_dyncom_thumb.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'src/core') diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index 78552293a..270d966b2 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -276,6 +276,17 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { |(tinstr & 0x007F); // off7 } else if ((tinstr & 0x0F00) == 0x0e00) { *ainstr = 0xEF000000 | 0x180000; // base | BKPT mask + } else if ((tinstr & 0x0F00) == 0x0200) { + static const ARMword subset[4] = { + 0xE6BF0070, // SXTH + 0xE6AF0070, // SXTB + 0xE6FF0070, // UXTH + 0xE6EF0070, // UXTB + }; + + *ainstr = subset[BITS(tinstr, 6, 7)] // base + | (BITS(tinstr, 0, 2) << 12) // Rd + | BITS(tinstr, 3, 5); // Rm } else if ((tinstr & 0x0F00) == 0x0a00) { static const ARMword subset[3] = { 0xE6BF0F30, // REV -- cgit v1.2.3 From 85b1dddda12ebe339cfc462845f899546ffabe41 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 31 May 2015 05:32:46 -0400 Subject: arm_dyncom_thumb: Implement CPS and SETEND --- src/core/arm/dyncom/arm_dyncom_thumb.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src/core') diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index 270d966b2..897bb0460 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -287,6 +287,19 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { *ainstr = subset[BITS(tinstr, 6, 7)] // base | (BITS(tinstr, 0, 2) << 12) // Rd | BITS(tinstr, 3, 5); // Rm + } else if ((tinstr & 0x0F00) == 0x600) { + if (BIT(tinstr, 5) == 0) { + // SETEND + *ainstr = 0xF1010000 // base + | (BIT(tinstr, 3) << 9); // endian specifier + } else { + // CPS + *ainstr = 0xF1080000 // base + | (BIT(tinstr, 0) << 6) // fiq bit + | (BIT(tinstr, 1) << 7) // irq bit + | (BIT(tinstr, 2) << 8) // abort bit + | (BIT(tinstr, 4) << 18); // enable bit + } } else if ((tinstr & 0x0F00) == 0x0a00) { static const ARMword subset[3] = { 0xE6BF0F30, // REV -- cgit v1.2.3 From c00781a908c9198c16bbbb06661ba162b48d81d5 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 31 May 2015 05:48:00 -0400 Subject: arm_dyncom_thumb: Fix encoding of BKPT's immediate --- src/core/arm/dyncom/arm_dyncom_thumb.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/core') diff --git a/src/core/arm/dyncom/arm_dyncom_thumb.cpp b/src/core/arm/dyncom/arm_dyncom_thumb.cpp index 897bb0460..83b532aac 100644 --- a/src/core/arm/dyncom/arm_dyncom_thumb.cpp +++ b/src/core/arm/dyncom/arm_dyncom_thumb.cpp @@ -275,7 +275,10 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) { : 0xE28DDF00) // ADD |(tinstr & 0x007F); // off7 } else if ((tinstr & 0x0F00) == 0x0e00) { - *ainstr = 0xEF000000 | 0x180000; // base | BKPT mask + // BKPT + *ainstr = 0xEF000000 // base + | BITS(tinstr, 0, 3) // imm4 field; + | (BITS(tinstr, 4, 7) << 8); // beginning 4 bits of imm12 } else if ((tinstr & 0x0F00) == 0x0200) { static const ARMword subset[4] = { 0xE6BF0070, // SXTH -- cgit v1.2.3