From d3fb1d6c3882e45dee66fe7e5cf7613268e1b7bb Mon Sep 17 00:00:00 2001 From: Subv Date: Sat, 19 Aug 2017 11:28:22 -0500 Subject: Dyncom: Fixed a conversion warning when decoding thumb instructions. --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index f4fbb8d04..f829b9229 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -759,7 +759,7 @@ static ThumbDecodeStatus DecodeThumbInstruction(u32 inst, u32 addr, u32* arm_ins ThumbDecodeStatus ret = TranslateThumbInstruction(addr, inst, arm_inst, inst_size); if (ret == ThumbDecodeStatus::BRANCH) { int inst_index; - int table_length = arm_instruction_trans_len; + int table_length = static_cast(arm_instruction_trans_len); u32 tinstr = GetThumbInstruction(inst, addr); switch ((tinstr & 0xF800) >> 11) { -- cgit v1.2.3 From 9d0841b48b6b6f3c5a2425922617343fc2f79cdc Mon Sep 17 00:00:00 2001 From: Subv Date: Sat, 19 Aug 2017 11:30:20 -0500 Subject: Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache. Fixes a few warnings. --- src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 6 +++--- src/core/arm/skyeye_common/armstate.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index f829b9229..3522d1e82 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -838,7 +838,7 @@ static unsigned int InterpreterTranslateInstruction(const ARMul_State* cpu, cons return inst_size; } -static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) { +static int InterpreterTranslateBlock(ARMul_State* cpu, std::size_t& bb_start, u32 addr) { MICROPROFILE_SCOPE(DynCom_Decode); // Decode instruction, get index @@ -871,7 +871,7 @@ static int InterpreterTranslateBlock(ARMul_State* cpu, int& bb_start, u32 addr) return KEEP_GOING; } -static int InterpreterTranslateSingle(ARMul_State* cpu, int& bb_start, u32 addr) { +static int InterpreterTranslateSingle(ARMul_State* cpu, std::size_t& bb_start, u32 addr) { MICROPROFILE_SCOPE(DynCom_Decode); ARM_INST_PTR inst_base = nullptr; @@ -1620,7 +1620,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { unsigned int addr; unsigned int num_instrs = 0; - int ptr; + std::size_t ptr; LOAD_NZCVT; DISPATCH : { diff --git a/src/core/arm/skyeye_common/armstate.h b/src/core/arm/skyeye_common/armstate.h index 1a707ff7e..893877797 100644 --- a/src/core/arm/skyeye_common/armstate.h +++ b/src/core/arm/skyeye_common/armstate.h @@ -230,7 +230,7 @@ public: // TODO(bunnei): Move this cache to a better place - it should be per codeset (likely per // process for our purposes), not per ARMul_State (which tracks CPU core state). - std::unordered_map instruction_cache; + std::unordered_map instruction_cache; private: void ResetMPCoreCP15Registers(); -- cgit v1.2.3 From d237a890482b62c90c58691863dabd609c2aa34e Mon Sep 17 00:00:00 2001 From: Subv Date: Sat, 19 Aug 2017 11:33:01 -0500 Subject: CPU/Dynarmic: Fixed a warning when incrementing the number of ticks in ExecuteInstructions. --- src/core/arm/dynarmic/arm_dynarmic.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 7d2790b08..0a0b91590 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -136,7 +136,7 @@ MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64)); void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { MICROPROFILE_SCOPE(ARM_Jit); - unsigned ticks_executed = jit->Run(static_cast(num_instructions)); + std::size_t ticks_executed = jit->Run(static_cast(num_instructions)); AddTicks(ticks_executed); } -- cgit v1.2.3 From 7a3ab7c63ddcc79e9dfa46ae0347065f66052105 Mon Sep 17 00:00:00 2001 From: Subv Date: Sat, 12 Aug 2017 10:16:35 -0500 Subject: CPU/Dynarmic: Disable the fast page-table access in dynarmic until it supports switching page tables at runtime. --- src/core/arm/dynarmic/arm_dynarmic.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/core/arm') diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 7d2790b08..f2bd0d283 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -56,7 +56,9 @@ static Dynarmic::UserCallbacks GetUserCallbacks( user_callbacks.memory.Write16 = &Memory::Write16; user_callbacks.memory.Write32 = &Memory::Write32; user_callbacks.memory.Write64 = &Memory::Write64; - user_callbacks.page_table = Memory::GetCurrentPageTablePointers(); + // TODO(Subv): Re-add the page table pointers once dynarmic supports switching page tables at + // runtime. + user_callbacks.page_table = nullptr; user_callbacks.coprocessors[15] = std::make_shared(interpeter_state); return user_callbacks; } -- cgit v1.2.3 From 67a70bd9e1655dfd705550c1d561f3ba444360c8 Mon Sep 17 00:00:00 2001 From: MerryMage Date: Sun, 24 Sep 2017 22:44:13 +0100 Subject: ARM_Interface: Implement PageTableChanged --- src/core/arm/arm_interface.h | 3 +++ src/core/arm/dynarmic/arm_dynarmic.cpp | 22 +++++++++++++++++----- src/core/arm/dynarmic/arm_dynarmic.h | 10 +++++++++- src/core/arm/dyncom/arm_dyncom.cpp | 4 ++++ src/core/arm/dyncom/arm_dyncom.h | 1 + 5 files changed, 34 insertions(+), 6 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index ccd43f431..2aa017a54 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -41,6 +41,9 @@ public: /// Clear all instruction cache virtual void ClearInstructionCache() = 0; + /// Notify CPU emulation that page tables have changed + virtual void PageTableChanged() = 0; + /** * Set the Program Counter to an address * @param addr Address to set PC to diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 34c5aa381..42ae93ae8 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -41,7 +41,7 @@ static bool IsReadOnlyMemory(u32 vaddr) { } static Dynarmic::UserCallbacks GetUserCallbacks( - const std::shared_ptr& interpeter_state) { + const std::shared_ptr& interpeter_state, Memory::PageTable* current_page_table) { Dynarmic::UserCallbacks user_callbacks{}; user_callbacks.InterpreterFallback = &InterpreterFallback; user_callbacks.user_arg = static_cast(interpeter_state.get()); @@ -56,16 +56,14 @@ static Dynarmic::UserCallbacks GetUserCallbacks( user_callbacks.memory.Write16 = &Memory::Write16; user_callbacks.memory.Write32 = &Memory::Write32; user_callbacks.memory.Write64 = &Memory::Write64; - // TODO(Subv): Re-add the page table pointers once dynarmic supports switching page tables at - // runtime. - user_callbacks.page_table = nullptr; + user_callbacks.page_table = ¤t_page_table->pointers; user_callbacks.coprocessors[15] = std::make_shared(interpeter_state); return user_callbacks; } ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) { interpreter_state = std::make_shared(initial_mode); - jit = std::make_unique(GetUserCallbacks(interpreter_state)); + PageTableChanged(); } void ARM_Dynarmic::SetPC(u32 pc) { @@ -136,6 +134,7 @@ void ARM_Dynarmic::AddTicks(u64 ticks) { MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64)); void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { + ASSERT(Memory::GetCurrentPageTable() == current_page_table); MICROPROFILE_SCOPE(ARM_Jit); std::size_t ticks_executed = jit->Run(static_cast(num_instructions)); @@ -178,3 +177,16 @@ void ARM_Dynarmic::PrepareReschedule() { void ARM_Dynarmic::ClearInstructionCache() { jit->ClearCache(); } + +void ARM_Dynarmic::PageTableChanged() { + current_page_table = Memory::GetCurrentPageTable(); + + auto iter = jits.find(current_page_table); + if (iter != jits.end()) { + jit = iter->second.get(); + return; + } + + jit = new Dynarmic::Jit(GetUserCallbacks(interpreter_state, current_page_table)); + jits.emplace(current_page_table, std::unique_ptr(jit)); +} diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h index 834dc989e..96148a1a5 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.h +++ b/src/core/arm/dynarmic/arm_dynarmic.h @@ -4,12 +4,17 @@ #pragma once +#include #include #include #include "common/common_types.h" #include "core/arm/arm_interface.h" #include "core/arm/skyeye_common/armstate.h" +namespace Memory { +struct PageTable; +} // namespace Memory + class ARM_Dynarmic final : public ARM_Interface { public: ARM_Dynarmic(PrivilegeMode initial_mode); @@ -36,8 +41,11 @@ public: void ExecuteInstructions(int num_instructions) override; void ClearInstructionCache() override; + void PageTableChanged() override; private: - std::unique_ptr jit; + Dynarmic::Jit* jit = nullptr; + Memory::PageTable* current_page_table = nullptr; + std::map> jits; std::shared_ptr interpreter_state; }; diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index 81f9bf99e..da955c9b9 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -25,6 +25,10 @@ void ARM_DynCom::ClearInstructionCache() { trans_cache_buf_top = 0; } +void ARM_DynCom::PageTableChanged() { + ClearInstructionCache(); +} + void ARM_DynCom::SetPC(u32 pc) { state->Reg[15] = pc; } diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 62c174f3c..0ae535671 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h @@ -16,6 +16,7 @@ public: ~ARM_DynCom(); void ClearInstructionCache() override; + void PageTableChanged() override; void SetPC(u32 pc) override; u32 GetPC() const override; -- cgit v1.2.3 From 529f4a01318a450f999ffa7e01c5c26f801d22e0 Mon Sep 17 00:00:00 2001 From: Huw Pascoe Date: Sat, 30 Sep 2017 17:25:49 +0100 Subject: Moved down_count to CoreTiming --- src/core/arm/arm_interface.h | 9 --------- src/core/arm/dynarmic/arm_dynarmic.cpp | 9 +-------- src/core/arm/dynarmic/arm_dynarmic.h | 2 -- src/core/arm/dyncom/arm_dyncom.cpp | 8 +------- src/core/arm/dyncom/arm_dyncom.h | 2 -- 5 files changed, 2 insertions(+), 28 deletions(-) (limited to 'src/core/arm') diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 2aa017a54..ba528403c 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -124,12 +124,6 @@ public: */ virtual void SetCP15Register(CP15Register reg, u32 value) = 0; - /** - * Advance the CPU core by the specified number of ticks (e.g. to simulate CPU execution time) - * @param ticks Number of ticks to advance the CPU core - */ - virtual void AddTicks(u64 ticks) = 0; - /** * Saves the current CPU context * @param ctx Thread context to save @@ -150,9 +144,6 @@ public: return num_instructions; } - s64 down_count = 0; ///< A decreasing counter of remaining cycles before the next event, - /// decreased by the cpu run loop - protected: /** * Executes the given number of instructions diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 42ae93ae8..2cb56d12f 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -124,13 +124,6 @@ void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) { interpreter_state->CP15[reg] = value; } -void ARM_Dynarmic::AddTicks(u64 ticks) { - down_count -= ticks; - if (down_count < 0) { - CoreTiming::Advance(); - } -} - MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64)); void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { @@ -139,7 +132,7 @@ void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { std::size_t ticks_executed = jit->Run(static_cast(num_instructions)); - AddTicks(ticks_executed); + CoreTiming::AddTicks(ticks_executed); } void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h index 96148a1a5..0b00158a5 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.h +++ b/src/core/arm/dynarmic/arm_dynarmic.h @@ -32,8 +32,6 @@ public: u32 GetCP15Register(CP15Register reg) override; void SetCP15Register(CP15Register reg, u32 value) override; - void AddTicks(u64 ticks) override; - void SaveContext(ThreadContext& ctx) override; void LoadContext(const ThreadContext& ctx) override; diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index da955c9b9..4d72aef77 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -77,12 +77,6 @@ void ARM_DynCom::SetCP15Register(CP15Register reg, u32 value) { state->CP15[reg] = value; } -void ARM_DynCom::AddTicks(u64 ticks) { - down_count -= ticks; - if (down_count < 0) - CoreTiming::Advance(); -} - void ARM_DynCom::ExecuteInstructions(int num_instructions) { state->NumInstrsToExecute = num_instructions; @@ -90,7 +84,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { // executing one instruction at a time. Otherwise, if a block is being executed, more // instructions may actually be executed than specified. unsigned ticks_executed = InterpreterMainLoop(state.get()); - AddTicks(ticks_executed); + CoreTiming::AddTicks(ticks_executed); } void ARM_DynCom::SaveContext(ThreadContext& ctx) { diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 0ae535671..fc1ffed6a 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h @@ -31,8 +31,6 @@ public: u32 GetCP15Register(CP15Register reg) override; void SetCP15Register(CP15Register reg, u32 value) override; - void AddTicks(u64 ticks) override; - void SaveContext(ThreadContext& ctx) override; void LoadContext(const ThreadContext& ctx) override; -- cgit v1.2.3