From 7b3452c7303cf348377de6702ddda0307533663c Mon Sep 17 00:00:00 2001
From: Yuri Kunde Schlesner <yuriks@yuriks.net>
Date: Mon, 22 Dec 2014 04:30:09 -0200
Subject: Move ThreadContext to core/core.h and deal with the fallout

---
 src/core/arm/arm_interface.h                 | 8 +++++---
 src/core/arm/dyncom/arm_dyncom.cpp           | 5 +++--
 src/core/arm/dyncom/arm_dyncom.h             | 4 ++--
 src/core/arm/interpreter/arm_interpreter.cpp | 6 ++++--
 src/core/arm/interpreter/arm_interpreter.h   | 4 ++--
 5 files changed, 16 insertions(+), 11 deletions(-)

(limited to 'src/core/arm')

diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index d3bd4a9a3..e612f7439 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -7,7 +7,9 @@
 #include "common/common.h"
 #include "common/common_types.h"
 
-#include "core/hle/svc.h"
+namespace Core {
+    struct ThreadContext;
+}
 
 /// Generic ARM11 CPU interface
 class ARM_Interface : NonCopyable {
@@ -87,13 +89,13 @@ public:
      * Saves the current CPU context
      * @param ctx Thread context to save
      */
-    virtual void SaveContext(ThreadContext& ctx) = 0;
+    virtual void SaveContext(Core::ThreadContext& ctx) = 0;
 
     /**
      * Loads a CPU context
      * @param ctx Thread context to load
      */
-    virtual void LoadContext(const ThreadContext& ctx) = 0;
+    virtual void LoadContext(const Core::ThreadContext& ctx) = 0;
 
     /// Prepare core for thread reschedule (if needed to correctly handle state)
     virtual void PrepareReschedule() = 0;
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 31eb879a2..9c4cc90f2 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -9,6 +9,7 @@
 #include "core/arm/dyncom/arm_dyncom.h"
 #include "core/arm/dyncom/arm_dyncom_interpreter.h"
 
+#include "core/core.h"
 #include "core/core_timing.h"
 
 const static cpu_config_t s_arm11_cpu_info = {
@@ -94,7 +95,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
     AddTicks(ticks_executed);
 }
 
-void ARM_DynCom::SaveContext(ThreadContext& ctx) {
+void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
     memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
     memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
 
@@ -110,7 +111,7 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) {
     ctx.mode = state->NextInstr;
 }
 
-void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
+void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
     memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
     memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
 
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index 9e102a46e..f16fb070c 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -71,13 +71,13 @@ public:
      * Saves the current CPU context
      * @param ctx Thread context to save
      */
-    void SaveContext(ThreadContext& ctx) override;
+    void SaveContext(Core::ThreadContext& ctx) override;
 
     /**
      * Loads a CPU context
      * @param ctx Thread context to load
      */
-    void LoadContext(const ThreadContext& ctx) override;
+    void LoadContext(const Core::ThreadContext& ctx) override;
 
     /// Prepare core for thread reschedule (if needed to correctly handle state)
     void PrepareReschedule() override;
diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp
index 80ebc359e..c76d371a2 100644
--- a/src/core/arm/interpreter/arm_interpreter.cpp
+++ b/src/core/arm/interpreter/arm_interpreter.cpp
@@ -4,6 +4,8 @@
 
 #include "core/arm/interpreter/arm_interpreter.h"
 
+#include "core/core.h"
+
 const static cpu_config_t arm11_cpu_info = {
     "armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE
 };
@@ -75,7 +77,7 @@ void ARM_Interpreter::ExecuteInstructions(int num_instructions) {
     ARMul_Emulate32(state);
 }
 
-void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
+void ARM_Interpreter::SaveContext(Core::ThreadContext& ctx) {
     memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers));
     memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers));
 
@@ -91,7 +93,7 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
     ctx.mode = state->NextInstr;
 }
 
-void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
+void ARM_Interpreter::LoadContext(const Core::ThreadContext& ctx) {
     memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers));
     memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers));
 
diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h
index 019dad5df..e5ecc69c2 100644
--- a/src/core/arm/interpreter/arm_interpreter.h
+++ b/src/core/arm/interpreter/arm_interpreter.h
@@ -70,13 +70,13 @@ public:
      * Saves the current CPU context
      * @param ctx Thread context to save
      */
-    void SaveContext(ThreadContext& ctx) override;
+    void SaveContext(Core::ThreadContext& ctx) override;
 
     /**
      * Loads a CPU context
      * @param ctx Thread context to load
      */
-    void LoadContext(const ThreadContext& ctx) override;
+    void LoadContext(const Core::ThreadContext& ctx) override;
 
     /// Prepare core for thread reschedule (if needed to correctly handle state)
     void PrepareReschedule() override;
-- 
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