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-rw-r--r--src/video_core/engines/const_buffer_engine_interface.h67
-rw-r--r--src/video_core/engines/kepler_compute.cpp2
-rw-r--r--src/video_core/engines/maxwell_3d.cpp2
-rw-r--r--src/video_core/engines/maxwell_3d.h34
4 files changed, 58 insertions, 47 deletions
diff --git a/src/video_core/engines/const_buffer_engine_interface.h b/src/video_core/engines/const_buffer_engine_interface.h
index d56a47710..724ee0fd6 100644
--- a/src/video_core/engines/const_buffer_engine_interface.h
+++ b/src/video_core/engines/const_buffer_engine_interface.h
@@ -16,11 +16,12 @@ namespace Tegra::Engines {
struct SamplerDescriptor {
union {
- BitField<0, 20, Tegra::Shader::TextureType> texture_type;
- BitField<20, 1, u32> is_array;
- BitField<21, 1, u32> is_buffer;
- BitField<22, 1, u32> is_shadow;
- u32 raw{};
+ u32 raw = 0;
+ BitField<0, 2, Tegra::Shader::TextureType> texture_type;
+ BitField<2, 3, Tegra::Texture::ComponentType> component_type;
+ BitField<5, 1, u32> is_array;
+ BitField<6, 1, u32> is_buffer;
+ BitField<7, 1, u32> is_shadow;
};
bool operator==(const SamplerDescriptor& rhs) const noexcept {
@@ -31,68 +32,48 @@ struct SamplerDescriptor {
return !operator==(rhs);
}
- static SamplerDescriptor FromTicTexture(Tegra::Texture::TextureType tic_texture_type) {
+ static SamplerDescriptor FromTIC(const Tegra::Texture::TICEntry& tic) {
+ using Tegra::Shader::TextureType;
SamplerDescriptor result;
- switch (tic_texture_type) {
+
+ // This is going to be used to determine the shading language type.
+ // Because of that we don't care about all component types on color textures.
+ result.component_type.Assign(tic.r_type.Value());
+
+ switch (tic.texture_type.Value()) {
case Tegra::Texture::TextureType::Texture1D:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D);
- result.is_array.Assign(0);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
+ result.texture_type.Assign(TextureType::Texture1D);
return result;
case Tegra::Texture::TextureType::Texture2D:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
- result.is_array.Assign(0);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
+ result.texture_type.Assign(TextureType::Texture2D);
return result;
case Tegra::Texture::TextureType::Texture3D:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture3D);
- result.is_array.Assign(0);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
+ result.texture_type.Assign(TextureType::Texture3D);
return result;
case Tegra::Texture::TextureType::TextureCubemap:
- result.texture_type.Assign(Tegra::Shader::TextureType::TextureCube);
- result.is_array.Assign(0);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
+ result.texture_type.Assign(TextureType::TextureCube);
return result;
case Tegra::Texture::TextureType::Texture1DArray:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D);
+ result.texture_type.Assign(TextureType::Texture1D);
result.is_array.Assign(1);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
return result;
case Tegra::Texture::TextureType::Texture2DArray:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
+ result.texture_type.Assign(TextureType::Texture2D);
result.is_array.Assign(1);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
return result;
case Tegra::Texture::TextureType::Texture1DBuffer:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture1D);
- result.is_array.Assign(0);
+ result.texture_type.Assign(TextureType::Texture1D);
result.is_buffer.Assign(1);
- result.is_shadow.Assign(0);
return result;
case Tegra::Texture::TextureType::Texture2DNoMipmap:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
- result.is_array.Assign(0);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
+ result.texture_type.Assign(TextureType::Texture2D);
return result;
case Tegra::Texture::TextureType::TextureCubeArray:
- result.texture_type.Assign(Tegra::Shader::TextureType::TextureCube);
+ result.texture_type.Assign(TextureType::TextureCube);
result.is_array.Assign(1);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
return result;
default:
- result.texture_type.Assign(Tegra::Shader::TextureType::Texture2D);
- result.is_array.Assign(0);
- result.is_buffer.Assign(0);
- result.is_shadow.Assign(0);
+ result.texture_type.Assign(TextureType::Texture2D);
return result;
}
}
diff --git a/src/video_core/engines/kepler_compute.cpp b/src/video_core/engines/kepler_compute.cpp
index ae52afa79..1ecd65925 100644
--- a/src/video_core/engines/kepler_compute.cpp
+++ b/src/video_core/engines/kepler_compute.cpp
@@ -89,7 +89,7 @@ SamplerDescriptor KeplerCompute::AccessBindlessSampler(ShaderType stage, u64 con
const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)};
const Texture::FullTextureInfo tex_info = GetTextureInfo(tex_handle);
- SamplerDescriptor result = SamplerDescriptor::FromTicTexture(tex_info.tic.texture_type.Value());
+ SamplerDescriptor result = SamplerDescriptor::FromTIC(tex_info.tic);
result.is_shadow.Assign(tex_info.tsc.depth_compare_enabled.Value());
return result;
}
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 89050361e..ce536e29b 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -638,7 +638,7 @@ SamplerDescriptor Maxwell3D::AccessBindlessSampler(ShaderType stage, u64 const_b
const Texture::TextureHandle tex_handle{memory_manager.Read<u32>(tex_info_address)};
const Texture::FullTextureInfo tex_info = GetTextureInfo(tex_handle);
- SamplerDescriptor result = SamplerDescriptor::FromTicTexture(tex_info.tic.texture_type.Value());
+ SamplerDescriptor result = SamplerDescriptor::FromTIC(tex_info.tic);
result.is_shadow.Assign(tex_info.tsc.depth_compare_enabled.Value());
return result;
}
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index ed7fc8fdd..8752a1cfb 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -67,6 +67,7 @@ public:
static constexpr std::size_t NumVaryings = 31;
static constexpr std::size_t NumImages = 8; // TODO(Rodrigo): Investigate this number
static constexpr std::size_t NumClipDistances = 8;
+ static constexpr std::size_t NumTransformFeedbackBuffers = 4;
static constexpr std::size_t MaxShaderProgram = 6;
static constexpr std::size_t MaxShaderStage = 5;
// Maximum number of const buffers per shader stage.
@@ -627,6 +628,22 @@ public:
float depth_range_far;
};
+ struct alignas(32) TransformFeedbackBinding {
+ u32 buffer_enable;
+ u32 address_high;
+ u32 address_low;
+ s32 buffer_size;
+ s32 buffer_offset;
+ };
+ static_assert(sizeof(TransformFeedbackBinding) == 32);
+
+ struct alignas(16) TransformFeedbackLayout {
+ u32 stream;
+ u32 varying_count;
+ u32 stride;
+ };
+ static_assert(sizeof(TransformFeedbackLayout) == 16);
+
bool IsShaderConfigEnabled(std::size_t index) const {
// The VertexB is always enabled.
if (index == static_cast<std::size_t>(Regs::ShaderProgram::VertexB)) {
@@ -683,7 +700,13 @@ public:
u32 rasterize_enable;
- INSERT_UNION_PADDING_WORDS(0xF1);
+ std::array<TransformFeedbackBinding, NumTransformFeedbackBuffers> tfb_bindings;
+
+ INSERT_UNION_PADDING_WORDS(0xC0);
+
+ std::array<TransformFeedbackLayout, NumTransformFeedbackBuffers> tfb_layouts;
+
+ INSERT_UNION_PADDING_WORDS(0x1);
u32 tfb_enabled;
@@ -1202,7 +1225,11 @@ public:
u32 tex_cb_index;
- INSERT_UNION_PADDING_WORDS(0x395);
+ INSERT_UNION_PADDING_WORDS(0x7D);
+
+ std::array<std::array<u8, 128>, NumTransformFeedbackBuffers> tfb_varying_locs;
+
+ INSERT_UNION_PADDING_WORDS(0x298);
struct {
/// Compressed address of a buffer that holds information about bound SSBOs.
@@ -1428,6 +1455,8 @@ ASSERT_REG_POSITION(tess_mode, 0xC8);
ASSERT_REG_POSITION(tess_level_outer, 0xC9);
ASSERT_REG_POSITION(tess_level_inner, 0xCD);
ASSERT_REG_POSITION(rasterize_enable, 0xDF);
+ASSERT_REG_POSITION(tfb_bindings, 0xE0);
+ASSERT_REG_POSITION(tfb_layouts, 0x1C0);
ASSERT_REG_POSITION(tfb_enabled, 0x1D1);
ASSERT_REG_POSITION(rt, 0x200);
ASSERT_REG_POSITION(viewport_transform, 0x280);
@@ -1526,6 +1555,7 @@ ASSERT_REG_POSITION(firmware, 0x8C0);
ASSERT_REG_POSITION(const_buffer, 0x8E0);
ASSERT_REG_POSITION(cb_bind[0], 0x904);
ASSERT_REG_POSITION(tex_cb_index, 0x982);
+ASSERT_REG_POSITION(tfb_varying_locs, 0xA00);
ASSERT_REG_POSITION(ssbo_info, 0xD18);
ASSERT_REG_POSITION(tex_info_buffers.address[0], 0xD2A);
ASSERT_REG_POSITION(tex_info_buffers.size[0], 0xD2F);
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-19 12:32:22 +0200