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-rw-r--r--src/core/arm/arm_interface.h19
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.cpp4
-rw-r--r--src/core/arm/dynarmic/arm_dynarmic.h8
-rw-r--r--src/core/arm/dyncom/arm_dyncom.cpp4
-rw-r--r--src/core/arm/dyncom/arm_dyncom.h8
5 files changed, 21 insertions, 22 deletions
diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h
index e466b21b2..ccd43f431 100644
--- a/src/core/arm/arm_interface.h
+++ b/src/core/arm/arm_interface.h
@@ -8,15 +8,22 @@
#include "core/arm/skyeye_common/arm_regformat.h"
#include "core/arm/skyeye_common/vfp/asm_vfp.h"
-namespace Core {
-struct ThreadContext;
-}
-
/// Generic ARM11 CPU interface
class ARM_Interface : NonCopyable {
public:
virtual ~ARM_Interface() {}
+ struct ThreadContext {
+ u32 cpu_registers[13];
+ u32 sp;
+ u32 lr;
+ u32 pc;
+ u32 cpsr;
+ u32 fpu_registers[64];
+ u32 fpscr;
+ u32 fpexc;
+ };
+
/**
* Runs the CPU for the given number of instructions
* @param num_instructions Number of instructions to run
@@ -124,13 +131,13 @@ public:
* Saves the current CPU context
* @param ctx Thread context to save
*/
- virtual void SaveContext(Core::ThreadContext& ctx) = 0;
+ virtual void SaveContext(ThreadContext& ctx) = 0;
/**
* Loads a CPU context
* @param ctx Thread context to load
*/
- virtual void LoadContext(const Core::ThreadContext& ctx) = 0;
+ virtual void LoadContext(const ThreadContext& ctx) = 0;
/// Prepare core for thread reschedule (if needed to correctly handle state)
virtual void PrepareReschedule() = 0;
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp
index f99fe08c4..9f25e3b00 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.cpp
+++ b/src/core/arm/dynarmic/arm_dynarmic.cpp
@@ -138,7 +138,7 @@ void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
AddTicks(ticks_executed);
}
-void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) {
+void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
memcpy(ctx.cpu_registers, jit->Regs().data(), sizeof(ctx.cpu_registers));
memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
@@ -151,7 +151,7 @@ void ARM_Dynarmic::SaveContext(Core::ThreadContext& ctx) {
ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
}
-void ARM_Dynarmic::LoadContext(const Core::ThreadContext& ctx) {
+void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
memcpy(jit->Regs().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h
index ced86d29b..87ab53d81 100644
--- a/src/core/arm/dynarmic/arm_dynarmic.h
+++ b/src/core/arm/dynarmic/arm_dynarmic.h
@@ -10,10 +10,6 @@
#include "core/arm/arm_interface.h"
#include "core/arm/skyeye_common/armstate.h"
-namespace Core {
-struct ThreadContext;
-}
-
class ARM_Dynarmic final : public ARM_Interface {
public:
ARM_Dynarmic(PrivilegeMode initial_mode);
@@ -33,8 +29,8 @@ public:
void AddTicks(u64 ticks) override;
- void SaveContext(Core::ThreadContext& ctx) override;
- void LoadContext(const Core::ThreadContext& ctx) override;
+ void SaveContext(ThreadContext& ctx) override;
+ void LoadContext(const ThreadContext& ctx) override;
void PrepareReschedule() override;
void ExecuteInstructions(int num_instructions) override;
diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp
index 34c7f945e..81f9bf99e 100644
--- a/src/core/arm/dyncom/arm_dyncom.cpp
+++ b/src/core/arm/dyncom/arm_dyncom.cpp
@@ -89,7 +89,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) {
AddTicks(ticks_executed);
}
-void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
+void ARM_DynCom::SaveContext(ThreadContext& ctx) {
memcpy(ctx.cpu_registers, state->Reg.data(), sizeof(ctx.cpu_registers));
memcpy(ctx.fpu_registers, state->ExtReg.data(), sizeof(ctx.fpu_registers));
@@ -102,7 +102,7 @@ void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) {
ctx.fpexc = state->VFP[VFP_FPEXC];
}
-void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) {
+void ARM_DynCom::LoadContext(const ThreadContext& ctx) {
memcpy(state->Reg.data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
memcpy(state->ExtReg.data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h
index 65db1f0f9..62c174f3c 100644
--- a/src/core/arm/dyncom/arm_dyncom.h
+++ b/src/core/arm/dyncom/arm_dyncom.h
@@ -10,10 +10,6 @@
#include "core/arm/skyeye_common/arm_regformat.h"
#include "core/arm/skyeye_common/armstate.h"
-namespace Core {
-struct ThreadContext;
-}
-
class ARM_DynCom final : public ARM_Interface {
public:
ARM_DynCom(PrivilegeMode initial_mode);
@@ -36,8 +32,8 @@ public:
void AddTicks(u64 ticks) override;
- void SaveContext(Core::ThreadContext& ctx) override;
- void LoadContext(const Core::ThreadContext& ctx) override;
+ void SaveContext(ThreadContext& ctx) override;
+ void LoadContext(const ThreadContext& ctx) override;
void PrepareReschedule() override;
void ExecuteInstructions(int num_instructions) override;