diff options
Diffstat (limited to '')
-rw-r--r-- | src/common/CMakeLists.txt | 2 | ||||
-rw-r--r-- | src/common/uint128.cpp | 41 | ||||
-rw-r--r-- | src/common/uint128.h | 14 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 5 | ||||
-rw-r--r-- | src/core/core_timing_util.cpp | 6 | ||||
-rw-r--r-- | src/core/core_timing_util.h | 3 |
6 files changed, 69 insertions, 2 deletions
diff --git a/src/common/CMakeLists.txt b/src/common/CMakeLists.txt index 3d30f0e3e..c538c6415 100644 --- a/src/common/CMakeLists.txt +++ b/src/common/CMakeLists.txt @@ -114,6 +114,8 @@ add_library(common STATIC threadsafe_queue.h timer.cpp timer.h + uint128.cpp + uint128.h vector_math.h web_result.h ) diff --git a/src/common/uint128.cpp b/src/common/uint128.cpp new file mode 100644 index 000000000..2238a52c5 --- /dev/null +++ b/src/common/uint128.cpp @@ -0,0 +1,41 @@ +#ifdef _MSC_VER +#include <intrin.h> + +#pragma intrinsic(_umul128) +#endif +#include <cstring> +#include "common/uint128.h" + +namespace Common { + +u128 Multiply64Into128(u64 a, u64 b) { + u128 result; +#ifdef _MSC_VER + result[0] = _umul128(a, b, &result[1]); +#else + unsigned __int128 tmp = a; + tmp *= b; + std::memcpy(&result, &tmp, sizeof(u128)); +#endif + return result; +} + +std::pair<u64, u64> Divide128On32(u128 dividend, u32 divisor) { + u64 remainder = dividend[0] % divisor; + u64 accum = dividend[0] / divisor; + if (dividend[1] == 0) + return {accum, remainder}; + // We ignore dividend[1] / divisor as that overflows + const u64 first_segment = (dividend[1] % divisor) << 32; + accum += (first_segment / divisor) << 32; + const u64 second_segment = (first_segment % divisor) << 32; + accum += (second_segment / divisor); + remainder += second_segment % divisor; + if (remainder >= divisor) { + accum++; + remainder -= divisor; + } + return {accum, remainder}; +} + +} // namespace Common diff --git a/src/common/uint128.h b/src/common/uint128.h new file mode 100644 index 000000000..52e6b46eb --- /dev/null +++ b/src/common/uint128.h @@ -0,0 +1,14 @@ + +#include <utility> +#include "common/common_types.h" + +namespace Common { + +// This function multiplies 2 u64 values and produces a u128 value; +u128 Multiply64Into128(u64 a, u64 b); + +// This function divides a u128 by a u32 value and produces two u64 values: +// the result of division and the remainder +std::pair<u64, u64> Divide128On32(u128 dividend, u32 divisor); + +} // namespace Common diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 9b7ca4030..4fdc12f11 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -12,6 +12,7 @@ #include "core/core.h" #include "core/core_cpu.h" #include "core/core_timing.h" +#include "core/core_timing_util.h" #include "core/gdbstub/gdbstub.h" #include "core/hle/kernel/process.h" #include "core/hle/kernel/svc.h" @@ -119,7 +120,7 @@ public: return std::max(parent.core_timing.GetDowncount(), 0); } u64 GetCNTPCT() override { - return parent.core_timing.GetTicks(); + return Timing::CpuCyclesToClockCycles(parent.core_timing.GetTicks()); } ARM_Dynarmic& parent; @@ -151,7 +152,7 @@ std::unique_ptr<Dynarmic::A64::Jit> ARM_Dynarmic::MakeJit() const { config.tpidr_el0 = &cb->tpidr_el0; config.dczid_el0 = 4; config.ctr_el0 = 0x8444c004; - config.cntfrq_el0 = 19200000; // Value from fusee. + config.cntfrq_el0 = Timing::CNTFREQ; // Unpredictable instructions config.define_unpredictable_behaviour = true; diff --git a/src/core/core_timing_util.cpp b/src/core/core_timing_util.cpp index 88ff70233..7942f30d6 100644 --- a/src/core/core_timing_util.cpp +++ b/src/core/core_timing_util.cpp @@ -7,6 +7,7 @@ #include <cinttypes> #include <limits> #include "common/logging/log.h" +#include "common/uint128.h" namespace Core::Timing { @@ -60,4 +61,9 @@ s64 nsToCycles(u64 ns) { return (BASE_CLOCK_RATE * static_cast<s64>(ns)) / 1000000000; } +u64 CpuCyclesToClockCycles(u64 ticks) { + const u128 temporal = Common::Multiply64Into128(ticks, CNTFREQ); + return Common::Divide128On32(temporal, static_cast<u32>(BASE_CLOCK_RATE)).first; +} + } // namespace Core::Timing diff --git a/src/core/core_timing_util.h b/src/core/core_timing_util.h index 513cfac1b..679aa3123 100644 --- a/src/core/core_timing_util.h +++ b/src/core/core_timing_util.h @@ -11,6 +11,7 @@ namespace Core::Timing { // The below clock rate is based on Switch's clockspeed being widely known as 1.020GHz // The exact value used is of course unverified. constexpr u64 BASE_CLOCK_RATE = 1019215872; // Switch clock speed is 1020MHz un/docked +constexpr u64 CNTFREQ = 19200000; // Value from fusee. inline s64 msToCycles(int ms) { // since ms is int there is no way to overflow @@ -61,4 +62,6 @@ inline u64 cyclesToMs(s64 cycles) { return cycles * 1000 / BASE_CLOCK_RATE; } +u64 CpuCyclesToClockCycles(u64 ticks); + } // namespace Core::Timing |