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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2018-12-22 05:20:57 +0100 |
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committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2019-01-15 21:54:52 +0100 |
commit | 03e088a4f44af1212da0c7c23f95293a6e129a35 (patch) | |
tree | 4c5b87cabf709f6ca3a839b7dff7c75b7ced2a4c /src/video_core/shader/shader_ir.h | |
parent | shader_decode: Fixup FSET (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/video_core/shader/shader_ir.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/video_core/shader/shader_ir.h b/src/video_core/shader/shader_ir.h index b1083c4a0..5939318c1 100644 --- a/src/video_core/shader/shader_ir.h +++ b/src/video_core/shader/shader_ir.h @@ -265,6 +265,7 @@ struct MetaHalfArithmetic { struct MetaTexture { const Sampler& sampler; u32 coords_count{}; + std::optional<u32> array_index; }; struct MetaComponents { @@ -696,7 +697,8 @@ private: Node GetTextureCode(Tegra::Shader::Instruction instr, Tegra::Shader::TextureType texture_type, Tegra::Shader::TextureProcessMode process_mode, bool depth_compare, - bool is_array, std::size_t bias_offset, std::vector<Node>&& coords); + bool is_array, std::size_t array_offset, std::size_t bias_offset, + std::vector<Node>&& coords); void WriteLogicOperation(BasicBlock& bb, Tegra::Shader::Register dest, Tegra::Shader::LogicOperation logic_op, Node op_a, Node op_b, |