diff options
author | Subv <subv2112@gmail.com> | 2018-06-05 02:18:11 +0200 |
---|---|---|
committer | Subv <subv2112@gmail.com> | 2018-06-05 02:18:11 +0200 |
commit | 6cf6fa28427136dcb1d3897148898bf5ff2591dc (patch) | |
tree | 70d744fbe8b40af650e9557ec06aaeaaffd9d812 /src/video_core/renderer_opengl/gl_shader_decompiler.cpp | |
parent | GPU: Take into account predicated exits when performing shader control flow analysis. (diff) | |
download | yuzu-6cf6fa28427136dcb1d3897148898bf5ff2591dc.tar yuzu-6cf6fa28427136dcb1d3897148898bf5ff2591dc.tar.gz yuzu-6cf6fa28427136dcb1d3897148898bf5ff2591dc.tar.bz2 yuzu-6cf6fa28427136dcb1d3897148898bf5ff2591dc.tar.lz yuzu-6cf6fa28427136dcb1d3897148898bf5ff2591dc.tar.xz yuzu-6cf6fa28427136dcb1d3897148898bf5ff2591dc.tar.zst yuzu-6cf6fa28427136dcb1d3897148898bf5ff2591dc.zip |
Diffstat (limited to '')
-rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index c802532db..6391f1ad4 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp @@ -1093,9 +1093,6 @@ private: default: { switch (opcode->GetId()) { case OpCode::Id::EXIT: { - ASSERT_MSG(instr.pred.pred_index == static_cast<u64>(Pred::UnusedIndex), - "Predicated exits not implemented"); - // Final color output is currently hardcoded to GPR0-3 for fragment shaders if (stage == Maxwell3D::Regs::ShaderStage::Fragment) { shader.AddLine("color.r = " + regs.GetRegisterAsFloat(0) + ';'); @@ -1105,7 +1102,12 @@ private: } shader.AddLine("return true;"); - offset = PROGRAM_END - 1; + if (instr.pred.pred_index == static_cast<u64>(Pred::UnusedIndex)) { + // If this is an unconditional exit then just end processing here, otherwise we + // have to account for the possibility of the condition not being met, so + // continue processing the next instruction. + offset = PROGRAM_END - 1; + } break; } case OpCode::Id::KIL: { |