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author | bunnei <bunneidev@gmail.com> | 2018-07-21 20:29:36 +0200 |
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committer | bunnei <bunneidev@gmail.com> | 2018-07-22 03:51:06 +0200 |
commit | cd47391c2d32caf36d38805d138530e2121a247a (patch) | |
tree | 5babe011761c01194e9484602edb324b4b4cbb06 /src/video_core/renderer_opengl/gl_rasterizer_cache.h | |
parent | gl_rasterizer: Use zeta_enable register to enable depth buffer. (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/video_core/renderer_opengl/gl_rasterizer_cache.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/video_core/renderer_opengl/gl_rasterizer_cache.h b/src/video_core/renderer_opengl/gl_rasterizer_cache.h index 718c45ce1..d00746e8c 100644 --- a/src/video_core/renderer_opengl/gl_rasterizer_cache.h +++ b/src/video_core/renderer_opengl/gl_rasterizer_cache.h @@ -365,9 +365,9 @@ struct SurfaceParams { const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config); /// Creates SurfaceParams for a depth buffer configuration - static SurfaceParams CreateForDepthBuffer( - const Tegra::Engines::Maxwell3D::Regs::RenderTargetConfig& config, - Tegra::GPUVAddr zeta_address, Tegra::DepthFormat format); + static SurfaceParams CreateForDepthBuffer(u32 zeta_width, u32 zeta_height, + Tegra::GPUVAddr zeta_address, + Tegra::DepthFormat format); Tegra::GPUVAddr addr; bool is_tiled; |