diff options
author | Subv <subv2112@gmail.com> | 2018-06-12 18:24:10 +0200 |
---|---|---|
committer | Subv <subv2112@gmail.com> | 2018-06-12 18:46:45 +0200 |
commit | db0497b808c8f092d55f3331e35eb37b83e496c8 (patch) | |
tree | 13133ab3fc15a4aa2734ca6f21649cabf37c1b98 /src/video_core/engines/shader_bytecode.h | |
parent | Merge pull request #555 from Subv/gpu_sysregs (diff) | |
download | yuzu-db0497b808c8f092d55f3331e35eb37b83e496c8.tar yuzu-db0497b808c8f092d55f3331e35eb37b83e496c8.tar.gz yuzu-db0497b808c8f092d55f3331e35eb37b83e496c8.tar.bz2 yuzu-db0497b808c8f092d55f3331e35eb37b83e496c8.tar.lz yuzu-db0497b808c8f092d55f3331e35eb37b83e496c8.tar.xz yuzu-db0497b808c8f092d55f3331e35eb37b83e496c8.tar.zst yuzu-db0497b808c8f092d55f3331e35eb37b83e496c8.zip |
Diffstat (limited to '')
-rw-r--r-- | src/video_core/engines/shader_bytecode.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index ec8dbd370..5ec69596b 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -217,7 +217,7 @@ union Instruction { union { BitField<20, 19, u64> imm20_19; - BitField<20, 32, u64> imm20_32; + BitField<20, 32, s64> imm20_32; BitField<45, 1, u64> negate_b; BitField<46, 1, u64> abs_a; BitField<48, 1, u64> negate_a; @@ -247,7 +247,7 @@ union Instruction { float GetImm20_32() const { float result{}; - u32 imm{static_cast<u32>(imm20_32)}; + s32 imm{static_cast<s32>(imm20_32)}; std::memcpy(&result, &imm, sizeof(imm)); return result; } @@ -271,6 +271,11 @@ union Instruction { } alu_integer; union { + BitField<54, 1, u64> saturate; + BitField<56, 1, u64> negate_a; + } iadd32i; + + union { BitField<20, 8, u64> shift_position; BitField<28, 8, u64> shift_length; BitField<48, 1, u64> negate_b; @@ -451,6 +456,7 @@ public: IADD_C, IADD_R, IADD_IMM, + IADD32I, ISCADD_C, // Scale and Add ISCADD_R, ISCADD_IMM, @@ -510,6 +516,7 @@ public: Trivial, Arithmetic, ArithmeticInteger, + ArithmeticIntegerImmediate, Bfe, Logic, Shift, @@ -642,6 +649,7 @@ private: INST("0100110000010---", Id::IADD_C, Type::ArithmeticInteger, "IADD_C"), INST("0101110000010---", Id::IADD_R, Type::ArithmeticInteger, "IADD_R"), INST("0011100-00010---", Id::IADD_IMM, Type::ArithmeticInteger, "IADD_IMM"), + INST("0001110---------", Id::IADD32I, Type::ArithmeticIntegerImmediate, "IADD32I"), INST("0100110000011---", Id::ISCADD_C, Type::ArithmeticInteger, "ISCADD_C"), INST("0101110000011---", Id::ISCADD_R, Type::ArithmeticInteger, "ISCADD_R"), INST("0011100-00011---", Id::ISCADD_IMM, Type::ArithmeticInteger, "ISCADD_IMM"), |