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author | Subv <subv2112@gmail.com> | 2018-06-05 02:03:47 +0200 |
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committer | Subv <subv2112@gmail.com> | 2018-06-05 03:17:41 +0200 |
commit | 23b1e6eded2d4af99b69d6958314db610ab23cd3 (patch) | |
tree | 14161915d3416ded9edd36c45bbb6ac03f6394da /src/video_core/engines/shader_bytecode.h | |
parent | GPU: Added decodings for the ISCADD instructions. (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/video_core/engines/shader_bytecode.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index da451c4d6..8d4ea3401 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -233,6 +233,22 @@ union Instruction { } alu; union { + BitField<39, 5, u64> shift_amount; + BitField<20, 19, u64> immediate_low; + BitField<56, 1, u64> immediate_high; + BitField<48, 1, u64> negate_b; + BitField<49, 1, u64> negate_a; + + s32 GetImmediate() const { + u32 immediate = static_cast<u32>(immediate_low | (immediate_high << 19)); + // Sign extend the 20-bit value. + u32 mask = 1U << (20 - 1); + return static_cast<s32>((immediate ^ mask) - mask); + } + + } iscadd; + + union { BitField<48, 1, u64> negate_b; BitField<49, 1, u64> negate_c; } ffma; |