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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2019-01-23 00:49:31 +0100 |
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committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2019-02-10 23:29:33 +0100 |
commit | 1ddcd0e6f03e83d0447f03ac57d5e0bda7a2f4c7 (patch) | |
tree | 4d927140ea9fb1a44a0fdeaefdbcf30a7c360f18 /src/video_core/engines/maxwell_compute.cpp | |
parent | Merge pull request #2083 from ReinUsesLisp/shader-ir-cbuf-tracking (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/video_core/engines/maxwell_compute.cpp | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/src/video_core/engines/maxwell_compute.cpp b/src/video_core/engines/maxwell_compute.cpp deleted file mode 100644 index 656db6a61..000000000 --- a/src/video_core/engines/maxwell_compute.cpp +++ /dev/null @@ -1,28 +0,0 @@ -// Copyright 2018 yuzu Emulator Project -// Licensed under GPLv2 or any later version -// Refer to the license.txt file included. - -#include "common/logging/log.h" -#include "core/core.h" -#include "video_core/engines/maxwell_compute.h" - -namespace Tegra::Engines { - -void MaxwellCompute::CallMethod(const GPU::MethodCall& method_call) { - ASSERT_MSG(method_call.method < Regs::NUM_REGS, - "Invalid MaxwellCompute register, increase the size of the Regs structure"); - - regs.reg_array[method_call.method] = method_call.argument; - - switch (method_call.method) { - case MAXWELL_COMPUTE_REG_INDEX(compute): { - LOG_CRITICAL(HW_GPU, "Compute shaders are not implemented"); - UNREACHABLE(); - break; - } - default: - break; - } -} - -} // namespace Tegra::Engines |