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author | FengChen <vonchenplus@gmail.com> | 2022-10-30 12:59:11 +0100 |
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committer | Feng Chen <vonchenplus@gmail.com> | 2022-11-07 08:42:42 +0100 |
commit | a4472b55260ed1ccbad0d191d11abd2330145140 (patch) | |
tree | ed58bca8f35b79497099c8c73675332be455c28e /src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | |
parent | Merge pull request #9163 from vonchenplus/draw_error (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp index 52be12f9c..753c62098 100644 --- a/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp +++ b/src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp @@ -117,8 +117,7 @@ enum class SpecialRegister : u64 { case SpecialRegister::SR_THREAD_KILL: return IR::U32{ir.Select(ir.IsHelperInvocation(), ir.Imm32(-1), ir.Imm32(0))}; case SpecialRegister::SR_INVOCATION_INFO: - LOG_WARNING(Shader, "(STUBBED) SR_INVOCATION_INFO"); - return ir.Imm32(0x00ff'0000); + return ir.InvocationInfo(); case SpecialRegister::SR_TID: { const IR::Value tid{ir.LocalInvocationId()}; return ir.BitFieldInsert(ir.BitFieldInsert(IR::U32{ir.CompositeExtract(tid, 0)}, |