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author | David <25727384+ogniK5377@users.noreply.github.com> | 2018-05-25 00:36:12 +0200 |
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committer | bunnei <bunneidev@gmail.com> | 2018-05-25 00:36:12 +0200 |
commit | e3a92b09ba8ed4b7811edb13b86fd06ee40c950d (patch) | |
tree | 8b994cf24f7a3c4e5e35f8a2deff7334d41c6a5a /src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h | |
parent | Merge pull request #464 from bunnei/fix-msvc (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h index 2d43598b1..1d5ba2e67 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h @@ -25,6 +25,7 @@ private: IocGetActiveSlotMaskCommand = 0x80084714, IocZcullGetCtxSizeCommand = 0x80044701, IocZcullGetInfo = 0x80284702, + IocZbcSetTable = 0x402C4703, }; struct IoctlGpuCharacteristics { @@ -117,11 +118,21 @@ private: static_assert(sizeof(IoctlNvgpuGpuZcullGetInfoArgs) == 40, "IoctlNvgpuGpuZcullGetInfoArgs is incorrect size"); + struct IoctlZbcSetTable { + u32_le color_ds[4]; + u32_le color_l2[4]; + u32_le depth; + u32_le format; + u32_le type; + }; + static_assert(sizeof(IoctlZbcSetTable) == 44, "IoctlZbcSetTable is incorrect size"); + u32 GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output); u32 GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output); u32 GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output); u32 ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output); u32 ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output); + u32 ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output); }; } // namespace Service::Nvidia::Devices |