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| author | Liam <byteslice@airmail.cc> | 2023-10-24 18:53:53 +0200 |
|---|---|---|
| committer | Liam <byteslice@airmail.cc> | 2023-10-25 19:05:55 +0200 |
| commit | 4df063209bebeb8737cbefd47a8958977aff9c2d (patch) | |
| tree | 4b0d8b2c2b777aaeebe2a3d10b3b770bf809b824 /src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h | |
| parent | nvdrv: add ioctl command serialization, convert nvhost_as_gpu (diff) | |
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Diffstat (limited to '')
| -rw-r--r-- | src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h | 28 |
1 files changed, 13 insertions, 15 deletions
diff --git a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h index 97995551c..e1977a6b5 100644 --- a/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h +++ b/src/core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h @@ -151,21 +151,19 @@ private: }; static_assert(sizeof(IoctlGetGpuTime) == 0x10, "IoctlGetGpuTime is incorrect size"); - NvResult GetCharacteristics(std::span<const u8> input, std::span<u8> output); - NvResult GetCharacteristics(std::span<const u8> input, std::span<u8> output, - std::span<u8> inline_output); - - NvResult GetTPCMasks(std::span<const u8> input, std::span<u8> output); - NvResult GetTPCMasks(std::span<const u8> input, std::span<u8> output, - std::span<u8> inline_output); - - NvResult GetActiveSlotMask(std::span<const u8> input, std::span<u8> output); - NvResult ZCullGetCtxSize(std::span<const u8> input, std::span<u8> output); - NvResult ZCullGetInfo(std::span<const u8> input, std::span<u8> output); - NvResult ZBCSetTable(std::span<const u8> input, std::span<u8> output); - NvResult ZBCQueryTable(std::span<const u8> input, std::span<u8> output); - NvResult FlushL2(std::span<const u8> input, std::span<u8> output); - NvResult GetGpuTime(std::span<const u8> input, std::span<u8> output); + NvResult GetCharacteristics1(IoctlCharacteristics& params); + NvResult GetCharacteristics3(IoctlCharacteristics& params, std::span<u8> inline_output); + + NvResult GetTPCMasks1(IoctlGpuGetTpcMasksArgs& params); + NvResult GetTPCMasks3(IoctlGpuGetTpcMasksArgs& params, std::span<u8> inline_output); + + NvResult GetActiveSlotMask(IoctlActiveSlotMask& params); + NvResult ZCullGetCtxSize(IoctlZcullGetCtxSize& params); + NvResult ZCullGetInfo(IoctlNvgpuGpuZcullGetInfoArgs& params); + NvResult ZBCSetTable(IoctlZbcSetTable& params); + NvResult ZBCQueryTable(IoctlZbcQueryTable& params); + NvResult FlushL2(IoctlFlushL2& params); + NvResult GetGpuTime(IoctlGetGpuTime& params); EventInterface& events_interface; |