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author | MerryMage <MerryMage@users.noreply.github.com> | 2018-02-09 01:04:05 +0100 |
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committer | MerryMage <MerryMage@users.noreply.github.com> | 2018-02-09 01:29:36 +0100 |
commit | d3bbed5e78e6f324ff417d887b60df20cafc7a90 (patch) | |
tree | 1f17a63f865591e026c0cd1dc17168dda11802a3 /src/core/arm | |
parent | Merge pull request #169 from bunnei/gpu-mem (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.cpp | 74 | ||||
-rw-r--r-- | src/core/arm/dynarmic/arm_dynarmic.h | 2 |
2 files changed, 45 insertions, 31 deletions
diff --git a/src/core/arm/dynarmic/arm_dynarmic.cpp b/src/core/arm/dynarmic/arm_dynarmic.cpp index 72c54f984..302bae569 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic.cpp @@ -8,9 +8,12 @@ #include <dynarmic/A64/config.h> #include "core/arm/dynarmic/arm_dynarmic.h" #include "core/core_timing.h" +#include "core/hle/kernel/memory.h" #include "core/hle/kernel/svc.h" #include "core/memory.h" +using Vector = Dynarmic::A64::Vector; + class ARM_Dynarmic_Callbacks : public Dynarmic::A64::UserCallbacks { public: explicit ARM_Dynarmic_Callbacks(ARM_Dynarmic& parent) : parent(parent) {} @@ -28,6 +31,9 @@ public: u64 MemoryRead64(u64 vaddr) override { return Memory::Read64(vaddr); } + Vector MemoryRead128(u64 vaddr) override { + return {Memory::Read64(vaddr), Memory::Read64(vaddr + 8)}; + } void MemoryWrite8(u64 vaddr, u8 value) override { Memory::Write8(vaddr, value); @@ -41,6 +47,10 @@ public: void MemoryWrite64(u64 vaddr, u64 value) override { Memory::Write64(vaddr, value); } + void MemoryWrite128(u64 vaddr, Vector value) override { + Memory::Write64(vaddr, value[0]); + Memory::Write64(vaddr + 8, value[1]); + } void InterpreterFallback(u64 pc, size_t num_instructions) override { ARM_Interface::ThreadContext ctx; @@ -52,12 +62,12 @@ public: num_interpreted_instructions += num_instructions; } - void ExceptionRaised(u64 pc, Dynarmic::A64::Exception /*exception*/) override { - ASSERT_MSG(false, "ExceptionRaised(%" PRIx64 ")", pc); + void ExceptionRaised(u64 pc, Dynarmic::A64::Exception exception) override { + ASSERT_MSG(false, "ExceptionRaised(exception = %zu, pc = %" PRIx64 ")", + static_cast<size_t>(exception), pc); } void CallSVC(u32 swi) override { - printf("svc %x\n", swi); Kernel::CallSVC(swi); } @@ -78,9 +88,13 @@ public: u64 tpidrr0_el0 = 0; }; +std::unique_ptr<Dynarmic::A64::Jit> MakeJit(const std::unique_ptr<ARM_Dynarmic_Callbacks>& cb) { + Dynarmic::A64::UserConfig config{cb.get()}; + return std::make_unique<Dynarmic::A64::Jit>(config); +} + ARM_Dynarmic::ARM_Dynarmic() - : cb(std::make_unique<ARM_Dynarmic_Callbacks>(*this)), - jit(Dynarmic::A64::UserConfig{cb.get()}) { + : cb(std::make_unique<ARM_Dynarmic_Callbacks>(*this)), jit(MakeJit(cb)) { ARM_Interface::ThreadContext ctx; inner_unicorn.SaveContext(ctx); LoadContext(ctx); @@ -94,27 +108,27 @@ void ARM_Dynarmic::MapBackingMemory(u64 address, size_t size, u8* memory, } void ARM_Dynarmic::SetPC(u64 pc) { - jit.SetPC(pc); + jit->SetPC(pc); } u64 ARM_Dynarmic::GetPC() const { - return jit.GetPC(); + return jit->GetPC(); } u64 ARM_Dynarmic::GetReg(int index) const { - return jit.GetRegister(index); + return jit->GetRegister(index); } void ARM_Dynarmic::SetReg(int index, u64 value) { - jit.SetRegister(index, value); + jit->SetRegister(index, value); } u128 ARM_Dynarmic::GetExtReg(int index) const { - return jit.GetVector(index); + return jit->GetVector(index); } void ARM_Dynarmic::SetExtReg(int index, u128 value) { - jit.SetVector(index, value); + jit->SetVector(index, value); } u32 ARM_Dynarmic::GetVFPReg(int /*index*/) const { @@ -127,11 +141,11 @@ void ARM_Dynarmic::SetVFPReg(int /*index*/, u32 /*value*/) { } u32 ARM_Dynarmic::GetCPSR() const { - return jit.GetPstate(); + return jit->GetPstate(); } void ARM_Dynarmic::SetCPSR(u32 cpsr) { - jit.SetPstate(cpsr); + jit->SetPstate(cpsr); } u64 ARM_Dynarmic::GetTlsAddress() const { @@ -144,41 +158,41 @@ void ARM_Dynarmic::SetTlsAddress(u64 address) { void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { cb->ticks_remaining = num_instructions; - jit.Run(); + jit->Run(); CoreTiming::AddTicks(num_instructions - cb->num_interpreted_instructions); cb->num_interpreted_instructions = 0; } void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) { - ctx.cpu_registers = jit.GetRegisters(); - ctx.sp = jit.GetSP(); - ctx.pc = jit.GetPC(); - ctx.cpsr = jit.GetPstate(); - ctx.fpu_registers = jit.GetVectors(); - ctx.fpscr = jit.GetFpcr(); + ctx.cpu_registers = jit->GetRegisters(); + ctx.sp = jit->GetSP(); + ctx.pc = jit->GetPC(); + ctx.cpsr = jit->GetPstate(); + ctx.fpu_registers = jit->GetVectors(); + ctx.fpscr = jit->GetFpcr(); ctx.tls_address = cb->tpidrr0_el0; } void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) { - jit.SetRegisters(ctx.cpu_registers); - jit.SetSP(ctx.sp); - jit.SetPC(ctx.pc); - jit.SetPstate(static_cast<u32>(ctx.cpsr)); - jit.SetVectors(ctx.fpu_registers); - jit.SetFpcr(static_cast<u32>(ctx.fpscr)); + jit->SetRegisters(ctx.cpu_registers); + jit->SetSP(ctx.sp); + jit->SetPC(ctx.pc); + jit->SetPstate(static_cast<u32>(ctx.cpsr)); + jit->SetVectors(ctx.fpu_registers); + jit->SetFpcr(static_cast<u32>(ctx.fpscr)); cb->tpidrr0_el0 = ctx.tls_address; } void ARM_Dynarmic::PrepareReschedule() { - if (jit.IsExecuting()) { - jit.HaltExecution(); + if (jit->IsExecuting()) { + jit->HaltExecution(); } } void ARM_Dynarmic::ClearInstructionCache() { - jit.ClearCache(); + jit->ClearCache(); } void ARM_Dynarmic::PageTableChanged() { - UNIMPLEMENTED(); + jit = MakeJit(cb); } diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h index 43dc56d74..1d9dcf5ff 100644 --- a/src/core/arm/dynarmic/arm_dynarmic.h +++ b/src/core/arm/dynarmic/arm_dynarmic.h @@ -45,6 +45,6 @@ public: private: friend class ARM_Dynarmic_Callbacks; std::unique_ptr<ARM_Dynarmic_Callbacks> cb; - Dynarmic::A64::Jit jit; + std::unique_ptr<Dynarmic::A64::Jit> jit; ARM_Unicorn inner_unicorn; }; |