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author | Lioncash <mathew1800@gmail.com> | 2015-02-16 07:02:59 +0100 |
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committer | Lioncash <mathew1800@gmail.com> | 2015-02-16 07:03:01 +0100 |
commit | 012d1e32ad9dc772d2234efcd18fdb1fae9d14b3 (patch) | |
tree | 73bbb46892f26e8f348753b0512a1f527aba1c8e /src/core/arm/dyncom/arm_dyncom_interpreter.cpp | |
parent | Merge pull request #539 from linkmauve/framebuffer-formats (diff) | |
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Diffstat (limited to '')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index f4b3c4734..a8b3c1276 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3211,6 +3211,7 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) inst_cream->op1 = BITS(inst, 20, 24); inst_cream->op2 = BITS(inst, 5, 7); + inst_cream->Rd = BITS(inst, 16, 19); inst_cream->Rm = BITS(inst, 8, 11); inst_cream->Rn = BITS(inst, 0, 3); inst_cream->Ra = BITS(inst, 12, 15); |