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authorYuri Kunde Schlesner <yuriks@yuriks.net>2014-08-28 20:17:09 +0200
committerTony Wasserka <NeoBrainX@gmail.com>2014-10-12 14:37:24 +0200
commitfec7f6b035c1328cefac8a97cd26f3a79d033fa4 (patch)
tree0451cf6cd83d19aa4bcb8e033546bae3b8cc5bcb
parentOpenGL renderer: Shuffle initialization code around and rename functions. (diff)
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Diffstat (limited to '')
-rw-r--r--src/core/hw/gpu.cpp10
-rw-r--r--src/core/hw/gpu.h14
2 files changed, 10 insertions, 14 deletions
diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp
index 9c7192313..33a0e0fe7 100644
--- a/src/core/hw/gpu.cpp
+++ b/src/core/hw/gpu.cpp
@@ -89,7 +89,7 @@ inline void Write(u32 addr, const T data) {
} source_color = { 0, 0, 0, 0 };
switch (config.input_format) {
- case Regs::FramebufferFormat::RGBA8:
+ case Regs::PixelFormat::RGBA8:
{
// TODO: Most likely got the component order messed up.
u8* srcptr = source_pointer + x * 4 + y * config.input_width * 4;
@@ -106,7 +106,7 @@ inline void Write(u32 addr, const T data) {
}
switch (config.output_format) {
- /*case Regs::FramebufferFormat::RGBA8:
+ /*case Regs::PixelFormat::RGBA8:
{
// TODO: Untested
u8* dstptr = (u32*)(dest_pointer + x * 4 + y * config.output_width * 4);
@@ -117,7 +117,7 @@ inline void Write(u32 addr, const T data) {
break;
}*/
- case Regs::FramebufferFormat::RGB8:
+ case Regs::PixelFormat::RGB8:
{
// TODO: Most likely got the component order messed up.
u8* dstptr = dest_pointer + x * 3 + y * config.output_width * 3;
@@ -236,13 +236,13 @@ void Init() {
framebuffer_top.width = 240;
framebuffer_top.height = 400;
framebuffer_top.stride = 3 * 240;
- framebuffer_top.color_format = Regs::FramebufferFormat::RGB8;
+ framebuffer_top.color_format = Regs::PixelFormat::RGB8;
framebuffer_top.active_fb = 0;
framebuffer_sub.width = 240;
framebuffer_sub.height = 320;
framebuffer_sub.stride = 3 * 240;
- framebuffer_sub.color_format = Regs::FramebufferFormat::RGB8;
+ framebuffer_sub.color_format = Regs::PixelFormat::RGB8;
framebuffer_sub.active_fb = 0;
NOTICE_LOG(GPU, "initialized OK");
diff --git a/src/core/hw/gpu.h b/src/core/hw/gpu.h
index c853429a0..92097d182 100644
--- a/src/core/hw/gpu.h
+++ b/src/core/hw/gpu.h
@@ -56,7 +56,7 @@ struct Regs {
"Structure size and register block length don't match")
#endif
- enum class FramebufferFormat : u32 {
+ enum class PixelFormat : u32 {
RGBA8 = 0,
RGB8 = 1,
RGB565 = 2,
@@ -84,9 +84,7 @@ struct Regs {
INSERT_PADDING_WORDS(0x10b);
- struct {
- using Format = Regs::FramebufferFormat;
-
+ struct FramebufferConfig {
union {
u32 size;
@@ -102,7 +100,7 @@ struct Regs {
union {
u32 format;
- BitField< 0, 3, Format> color_format;
+ BitField< 0, 3, PixelFormat> color_format;
};
INSERT_PADDING_WORDS(0x1);
@@ -130,8 +128,6 @@ struct Regs {
INSERT_PADDING_WORDS(0x169);
struct {
- using Format = Regs::FramebufferFormat;
-
u32 input_address;
u32 output_address;
@@ -161,8 +157,8 @@ struct Regs {
u32 flags;
BitField< 0, 1, u32> flip_data; // flips input data horizontally (TODO) if true
- BitField< 8, 3, Format> input_format;
- BitField<12, 3, Format> output_format;
+ BitField< 8, 3, PixelFormat> input_format;
+ BitField<12, 3, PixelFormat> output_format;
BitField<16, 1, u32> output_tiled; // stores output in a tiled format
};